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70553-0106 , 2.54mm (.100") Pitch SL™ Header, Low Profile, Single Row, Right Angle, .120" PocketShrouded, 2 Circuits, 0.76μm (30μ") Gold (Au) Selective Plating, Tin (Sn) PC Tail
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54LS253
Dual TRI-STATE 1-of-4 Line Data Selector/Multiplexer
TL/F/6416
54LS253/DM54LS253/DM74LS253
TRI-STATE
Data
Selectors/Multiplexers
June 1989
54LS253/DM54LS253/DM74LS253
TRI-STATEÉ Data Selectors/Multiplexers
General Description
Eachof these Schottky-clamped data selectors/multiplex-
ers contains inverters and driversto supply fully comple-
mentary, on-chip, binary decoding data selectiontothe
AND-OR gates. Separate output control inputsare provided
for eachofthetwo four-line sections.
The TRI-STATE outputs can interface directly with data
linesofbus-organized systems. Withallbutoneofthe com-
mon outputs disabled(ata high impedance state),thelow
impedanceofthe single enabled outputwill drivethebus
linetoa highorlow logic level.
Features TRI-STATE versionof LS153 with same pinout Schottky-diode-clamped transistors Permit multiplexing from N-linestooneline Performs parallel-to-serial conversion Strobe/output control High fanout totem-pole outputs Typical propagation delay
Datato output 12ns
Selectto output21ns Typical power dissipation35 mW Alternate Military/Aerospace device (54LS253)is avail-
able. Contacta National Semiconductor Sales Office/
Distributorfor specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6416–1
Order Number 54LS253DMQB, 54LS253FMQB,
54LS253LMQB, DM54LS253J,DM54LS253W,
DM74LS253Mor DM74LS253N
SeeNS Package Number E20A, J16A,
M16A, N16Eor W16A
Function Table
Select Data Inputs Output OutputInputs Control A C0 C1 C2 C3 G Y XX X X H Z L X X X L L H X X X L H X L X X L L X H X X L H XX L X L L XX H X L H X X X L L L X X X H L H
AddressInputsAandBare common toboth sections.e HighLevel,Le LowLevel,X eDon’t Care,ZeHigh Impedance(off).
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.