DM74LS195AN ,7 V, 4-bit parallel access shift registerElectrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recomm ..
DM74LS195AN ,7 V, 4-bit parallel access shift registerfeatures parallel inputs, parallel outputs, I Synchronous parallel Ioad
J-R serial inputs, shift ..
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DM74LS20N ,Dual 4-Input NAND GatesGeneral DescriptionThis device contains two independent gates each of whichperforms the logic NAND ..
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54LS195ADMQB-DM74LS195AN
7 V, 4-bit parallel access shift register
National
Semiconductor
54LS195A/DM74LS195A
4-Bit Parallel Access Shift Register
General Description
This 4-bit register features parallel inputs, parallel outputs,
J-R serial inputs, shift/load control input, and a direct over-
riding clear. All inputs are buffered to lower the input drive
requirements. The registers have two modes of operation:
Parallel (broadside) load
Shift (in the direction QA toward Go)
Parallel loading is accomplished by applying the four bits of
data and taking the shift/load control input low. The data is
loaded into the associated flip-flop and appears at the out-
puts after the positive transition of the clock input. During
loading, serial data flow is inhibited.
Shifting is accomplished synchronously when the shift/load
control input is high. Serial data for this mode is entered at
the J-R inputs. These inputs permit the first stage to perform
as a J-R, D, or T-type flip-flop as shown in the truth table.
Features
a Synchronous parallel load
a Positive-edge-triggered clocking
a Parallel inputs and outputs from each flip-tlop
a Direct overriding clear
I: J and R inputs to first stage
n Complementary outputs from last stage
n For use in high-performance:
accumulators/processors
serial-to-parallel, paraIIeI-to-serial converters
n Typical clock frequency 39 MHz
II Typical power dissipation 70 mW
Connection Diagram
DuaHn-Llne Package
OUTPUTS
d " SHIFT/
Vcc 0A on ae
16 " " "
00 Tio CLOCK LOAD
" ll " "
l1 2 a q
CLEAR J i A
seniACmPurs
5 s 7 la
a c D GND
PARALLEL INPUTS
TL/Ft6408-1
Order Number 54LS195ADMOB, 54LS195AFMQB,
S4LS195ALMt2B, DM74LS195AM or DM74LSt95AN
See NS Package Number E20A, dt6A, M16A, N165 or W16A
VSSI-S'l
LS195A
Absolute Maximum Ratings (Note)
If Mllltary/Aeroapace specified devlces are required,
please contact the Natlonal Semlconductor Sales
Offleemltttrlbutort, for avallablllty and specifications.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
54LS -55'C to + 125''C
DM74LS ty'C to + 70°C
Storage Temperature Flange - 65''C to + 150"C
Recommended Operating Conditions
Note: The "Absolute, Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the "E/ectr/ba/ Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define
the conditions for actual device operation.
Symbol P ar am at er 54LS195A DM74LS195A Units
Min Nom Max Mln Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High Level Input Voltage 2 2 V
" Low Level Input Voltage 0.7 0.8 V
IOH High Level Output Current - 0.4 - 0.4 mA
lot. Low Level Output Current 4 tl mA
{CLK Clock Frequency (Note 1) 30 0 0 30 MHz
Clock Frequency (Note 2) 30 0 0 25 MHz
tw Pulse Width Clock 16 16 n s
(Note 3) Clear 14 12
tsu Setup Time Shift/ Load 25 25 ns
(Note 3) Data 15 15
tH Hold Time (Note 3) o 0 ns
tREL Shift/Load Release Time (Note 3) 10 10 ns
Clear Release Time (Note 3) 25 25
TA Free Air Operating Temperature - 55 125 0 70 "C
Note 1: th. = 15 pF, TA = 25-0 and Vcc " 5v.
Note 2: Ct. = so pF, RL = 2 kn. TA -- 25'C and va: = 5V.
Note 3: TA == 25'C and Vcc = 5V.
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Mln (N324) Max Units
VI InputCIamp Voltage Vcc == Min, I. = --18 mA -1.5 V
VOH High LevelOutput Vcc = Min, 'OH = Max 54LS 2.5 V
VOL Low Level Output Vcc = Min, IOL = Max 54LS 0.4
Voltage " == Max, VIH = Min DM74LS 0.35 0.5 v
IOL = 4 mA, Vcc = Min 0.25 0.4
II Input Current ti? Max Vcc = Max, VI = 7V 0 1 mA
Input Voltage .
IIH High Level Input Current Vcc = Max, VI = 2.7V 20 p.A
In Low Level InputCurrent Vcc = Max, VI = 0.4V -0.4 mA
los Short Circuit Vcc = Max 54LS -20 - 100 m A
Output Current (Note 5) DM74LS --20 _ 100
'00 Supply Current Vcc = Max, (Note 6) 14 21 mA
Note 4: All typicals are at Voc = 5V, TA = Mt.
Not. s.. Not more than one output should be shorted at a lime, and the duration should not exceed one second.
Note S: With all inputs open, SHIFT/LOAD grounded. and 4.5V applied to the J, R, and data inputs, ICC is measured by applying a momentary ground, then 4.5V to
the CLEAR and then applying a momentary ground then 4.5V to the CLOCK.
Switching Characteristics at Vcc = 5V and TA = 25''C (See Section 1 for TestWaveforms and Output Load)
54LS DM74LS
From (Input) _ RL == 2 kn
Symbol Parameter To (Output) CL 15 pF A. = 50 pF Units
Mln Max Mln Max
fMAx Maximum Clock 30 25 MHz
Frequency
tPLH Propagation Delay Time Clock to 21 26 as
Low to High Level Output Any 0
tpHL Propagation Delay Time Clock to 24 35 as
High to Low Level Output Any t2
tpHL Propagation Delay Time Clear to 26 38 ns
High to Low Level Output Any Q
Function Table
Inputs Outputs
Clear ihiftd/ Clock Serial - Parallel 0A the tlc On 60
oa J K A B D
L X X X X X X X X L L L H
H L t x x a b C d a b c 3
H H L x x x x x x 0A0 QBo Qco 000 Choo
H H t L H X X X X 0A0 0A0 QB" Qo, an
H H t L L x x x x L tu, thm QCn 66..
H H t H H X X X X H tu, thn QCn 5c"
H H t H L X X X X Cu, QAn thm thm Ua,
H == High Level (steady state), L = Low Level (steady state), X = Don't Care (any input, including transitions)
t = Transition from low to high level
a, b, c. d = The level of steady state input at A, B, C. or D, respectively.
tao, tho, av, thoo = The level of tax, ths, Qc. or On, respectively, before the indicated steady state input conditions were established.
tu,, thm, thm = The level 01 (2A, 03, (Do respectively. before the most recent transititm of the clock.
Logic Diagram
INPUT PARALLEL INPUTS
T R A a c F
SHIFT/LOAD (9) (2) 131 (l) (5) (8) (T)
CONTROL
''"""""Cy a
CLEAn‘” 9% r - q
CLEA_R CLEAR CLEAR CLEAR
£1 tta - LC>ZLOCK bC>Rcuxn< h<3 £103
s QA s as y s cc -0 L(Dd s tht
-tr-. "I-tr--'': ia'r4>-"-' 13) ttl
Pa tht I 90
PARALLEL OUTPUTS
TL/F/6408-2
VSGLS'I
LS195A
Timing Diagram
Typlcal Clear, Shift, and Load Sequences
SERIAL
INPUTS
SHIFT/ LOAD
PARALLEL
tNPUTtt
OUTPUTS
SERIAL SHIFT---
TL/F/6408-3
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
DM74LS195AN - product/dm74ls195an?HQS=T|-nu|I-nulI-dscataIog-df-pf-null-wwe
DM74LS195AM - product/dm74ls195am?HQS=T|-nu|I-null-dscataIog-df-pf-null-wwe
54LS195ALMQB - product/54Is195a|mqb?HQS=T|—nuIl-nu|I-dscataIog-df-pf-null-wwe
54LS195AFMQB - product/54Is195afmqb?HQS=T|—nuII-nulI-dscatalog-df—pf-null-wwe
54LS195ADMQB - product/54Is195aqub?HQS=T|-nu|l-nu|l-dscatalog-df-pf—nulI-wwe
