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54LS168DMQB
54LS168 Synchronous Bi-Directional BCD Decade Counter
TL/F/10207
54LS168
Synchronous
Bi-Directional
BCD
Decade
Counter
June 1989
54LS168 Synchronous Bi-Directional
BCD Decade Counter
General Description
The 54LS168isa fully synchronous 4-state up/down coun-
ter featuringa presetcapability forprogrammable operation,
carrylookaheadfor easy cascadinganda U/D inputto con-
trolthe directionof counting.It countsinthe BCD (8421)
sequenceandall state changes, whetherin countingorpar-
allel loading,are initiatedbythe LOW-to-HIGH transitionof
the clock.
Connection Diagram
Dual-In-Line Package
TL/F/10207–1
Order Number 54LS168DMQB,
54LS168FMQBor 54LS168LMQB
See NSPackageNumber
E20A, J16Aor W16A
Logic Symbol
TL/F/10207–2
VCCePin16
GND ePin8
Pin Names Description
CEP Count Enable Parallel Input(Active LOW)
CET Count Enable Trickle Input (Active LOW) Clock Pulse Input (Active Rising Edge)
P0–P3 ParallelData Inputs ParallelEnable Input (Active LOW)
U/D Up-Down CountControl Input
Q0–Q3 Flip-FlopOutputs TerminalCount Output(ActiveLOW)
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
