54LS165 ,8-BIT PARALLEL IN/SERIAL OUTPUT SHIFT REGISTERSFeatures
lished through a 2-input NOR gate, per-
" used as a clock-inhibit function. Hold-
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54LS165
8-BIT PARALLEL IN/SERIAL OUTPUT SHIFT REGISTERS
National
Semiconductor
54LS165/DM74LS165 8-Bit Parallel
ln/Serial Output Shift Registers
General Description
This device is an B-bit serial shift register which shifts data in
the direction of QA toward OH when clocked. Parallei-in ac-
cess is made available by eight individual direct data inputs,
which are enabled by a low level at the shift/Ioad input.
These registers also feature gated clock inputs and comple-
mentary outputs from the eighth bit.
Clocking is accomplished through a 2-input NOR gate, per-
mitting one input to be used as a clock-inhibit function. Hold-
ing either of the clock inputs high inhibits clocking, and hold-
ing either clock input low with the load input high enables
the other clock input. The clock-inhibit input should be
changed to the high level only while the clock input is high.
Parallel loading is inhibited as long as the load input is high.
Data at the parallel inputs are loaded directly into the regis-
ter on a high-to-low transition of the shift/load input, regard-
less of the logic levels on the clock, clock inhibit, or serial
inputs.
Features
I: Complementary outputs
a Direct overriding (data) inputs
u Gated clock inputs
l: Parailel-to-serial data conversion
a Typical frequency 35 MHz
a Typical power dissipation 105 mW
Connection Diagram
Duai-In-Line Package
VCC Imerr o c
'16 I " " "
PARALLEL INPUTS
---t-'---e-,
semALoumrr
a A input on
" 11 10 9
l 1 2 3 4 s e 1 la
sun/ CLOCK E F e H OUTPUT GND
LOAD tar,
PARALLEL INPUTS
TLIF/SSQB- 1
Order Number 54LS1650MOB. 54LS165FMOB, DM74LS165WM or DM74L5165N
See NS Package Number JISA, M168, N16E or W16A
Function Table
Inputs Internal
Outputs Output
'led Emil: Clock Serial Parallel th,
Ott n A...H 0A the
L X X X a..,h a b h
H L L X X 0A0 030 Gm
H L t H x H QAn Gen
H H X X X tbo thso tNo
H = High Level (steady state). L = Low Level (steady state)
X = Don't Care (any Input, including transitions)
t " Transition from Iow-to-high level
a...h == The level of steady-state input at inputs A thmugh H, respectively;
t2ao, tho, em = The level of 0A. ths, or thi, respectively. before the indicated steady-state input conditions were established.
tu,, thar, = The level 010A or tha, respectively. before the most recent t transition of the clock.
Absolute Maximum Ratings (Note)
if Mllltary/Aerospace speelmsd devlces are required,
please contact the National Semiconductor Sales
OfftttefDlatrlbutore for avallablllty and tttsee-lotta.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
54LS -55% to +125°C
DM74LS
Storage Temperature Range
ty'C to + 70°C
-65'C to + 150'C
Recommended Operating Conditions
Note: The "Absolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The de vice should not be operated at these limits. The
parametric values defined in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The ''Rettommentied Operating Conditions" table will define
the conditions for actual device operation.
Symbol Parameter 54LS165 DM74LS165 Units
Mln Nom Max Mln Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High Level Input Voltage 2 2 V
Mir, Low Level Inpu1Voltage 0.7 0.8 V
IOH High Level Output Current - 0.4 - 0.4 mA
lot. Low Level Output Current 4 8 mA
fCLK Clock Frequency (Note I) 30 0 25 MHz
chK Clock Frequency (Note 2) 0 20 MHz
tw Pulse Width Clock 18 25 ns
(Note 2) Load 15 15
tsu Setup Time Parallel 10 10
(Note 6) Serial IO 20 ns
Enable 10 30
Shift 10 45
tH Hold Time (Note 6) 5 0 ns
TA Free Air Operating Temperature - 55 125 0 70 (
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Condltlons Mln (H.353) Max Units
V. Input Clamp Voltage Voc = Min, II = -18 mA -1.5 V
VoH High Level Output Vcc = Min, IOH = Max 54LS 2.5 V
Voltage " = Max, V1... = Min DM74 2.7 3.4
VOL Low Level Output Voc = Min, IOL Ti..-. Max 54LS 0.4
Voltage " = Max, Ihr, = Min DM74 0.35 0.5 V
IOL = 4 mA, Vcc = Min 0.25 0.4
II InputCurmnt@ Max Vcc = Max, VI = 7V (DM74) Shift/Load 0.3 m A
Input Voltage V; = 10V (54LS) Others 0.1
lm High Level Input Vcc = Max Shift/Load 60 A
Current V. 2rr. 2.7V Others 20 "
IIL Low Level Input Vcc = Max Shift/Load -1.2 m A
Current V. = 0.4V Others -th4
Ios Short Circuit Vcc = Max 54LS - 20 - 100 mA
Output Current (Note 4) DM74 - 20 -100
'00 Supply Current Vcc = Max (Note 5) 21 36 mA
Note 1: CL = 15 pF, RL = 2 kn, TA = 25''C and Voc = 5V
Nate 2: Cs = 50 pF, RL = 2 kn, TA ' 25'C and Vcc ' 5V
Note 3: All typicals are at Voc = 5V, TA = 25' C.
Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Nttttt 6: With all outputs open, clock inhibit and shift/load at 4.5V, and a clock pulse applied to the CLOCK input, '00 is measured first with the parallel inputs at
ASV, then again grounded.
Nate tk TA = 25°C and Vcc = 5V.
Switching Characteristics at Vcc = 5V and TA = 25% (See Section 1 for Test Waveforms and Output Load)
54LS DMMLS
From (Input) = Ru = 2 kn
Symbol Parameter To (Output) CL " pF CL = 60 pF Unlts
Min Max Mln Max
fMAx Maximum Clock Frequency 25 20 MHz
tpLH Propagation Delay Time Load to 30 37 n tt
Low to High Level Output Any 0
tpHL Propagation Delay Time Load to 30 42 ns
High to Low Level Output Any 0
tpLH Propagation Delay Time Clock to 30 42 n tr
Low to High Level Output Any Q
tPHL Propagation Delay Time Clock to 30 47 ns
High to Low Level Output Any a
tpLH Propagation Delay Time H
Low to High Level Output to OH 20 27 ns
tpHL Propagation Delay Time H
High to Low Level Output to OH 30 37 ns
tpLH Propagation Delay Time H_
Low to High Level Output to OH 30 32 ns
tpHL Propagation Delay Time H
High to Low Level Output to G, 25 32 ns
Timing Diagram
Typical Shift, Load, and Inhibit Sequences
ccoccrLrllLr'llLrllLrLrLrllLrl
CLOCK INHIBIT l
SERIAL INPUT L
SHIFT/LOAD I I
A r H I
C [H I
DATA 4
E f H I
G f H I
ourpuvoH:'_'__] H HILIHLLIHILJH1
ourpu‘rGH---1 L LlHlL[HlLlHLLr
P- INHIBIT --F-----------sEmAc SHIFT
TL/FI6399-3
SQLS'I
c Diagram
PARALLEL INPUTS
A B C D E F G H
[(11) (12) (13) (14) '0) (4) (5) (6)
gnesgr gnfisgr gnesg‘r gnssgr lrsmzsn 285857 gnzsgv guess; (9)
° “ a c D OE F G ouwur 0N
rQrCLOCK -0 CLOCK q *CLOCK —G CLOCK -O > CLOCK -
CLOCK
SER'ALW, 9 6A n 6" a QC n 60 R 65 R 6,: R 65 IR 0H
CLEAR CLEAR CLEAR CLEAR cusnn CLEAR CLEAR [CLEAR ourpur 6“
SHIFT/ ‘1) ’
LOAD CD '
CLOCK “5’
INHIBIT
TLIF/6399—2
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
54LS165 - product/54Is165?HQS=TI-nu|I-nu|I-dscataIog-df-pf-null-wwe
54LS165 - product/54Is165?HQS=T|-nuIl-nu|I-dscataIog-df-pf-null-wwe
