DM74LS112AM , Dual Negative-Edge-Triggered Master-Slave J-K Flip-FlopNational
Semiconductor
54LS112/DM54LS112A/DM74LS112A
Dual Negative-Edge-Triggered Master-Slave ..
DM74LS112AN ,7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary outputGeneral Description
This device contains two independent negative-edge-trig-
gered J-K flip-flo ..
DM74LS11M ,Triple 3-Input AND GateFeaturesYAlternate military/aerospace device (54LS11) is avail-Thisdevicecontainsthreeindependentga ..
DM74LS11N ,Triple 3-Input AND GatesGeneral DescriptionThis device contains three independent gates each ofwhich performs the logic AND ..
DM74LS122N ,7 V, retriggerable one-shot with clear and complementary outputFunctional Description
The basic output pulse width is determined by selection of
the internal ..
DM74LS123M ,Dual Retriggerable One-Shot with Clear and Complementary OutputsFunctional Description
The basic output pulse width is determined by selection of
an external r ..
DS21354 ,3.3V/5V E1 Single Chip Transceivers (SCT)TABLE OF CONTENTS 1. INTRODUCTION...... 6 1.1.
DS21354L ,3.3V/5V E1 Single-Chip TransceiversFUNCTIONAL DESCRIPTION7 1.2. DOCUMENT REVISION HISTORY .8 2.
DS21354LB ,3.3V/5V E1 Single Chip Transceivers (SCT) DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
DS21354LB ,3.3V/5V E1 Single Chip Transceivers (SCT)BLOCK DIAGRAM .. 9 3.
DS21354LB+ ,3.3V/5V E1 Single Chip Transceivers (SCT)TABLE OF CONTENTS 1. INTRODUCTION...... 6 1.1.
DS21354LB+ ,3.3V/5V E1 Single Chip Transceivers (SCT)FEATURES The DS21354/DS213554 single-chip transceivers Complete E1 (CEPT) PCM-30/ISDN-PRI (SCTs) ..
54LS112DMQB-DM54LS112AJ-DM74LS112AM-DM74LS112AN
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output
gil Natiqnal
[ Semiconductor
54LS112/DM54LS112A/DM74LS112A
Dual Negative-Edge-Triggered Master-Slave
J-K Flip-Flops with Preset, Clear,
and Complementary Outputs
General Description
This device contains two independent negative-edge-trig-
gered J-K flip-flops with complementary outputs. The J and
K data is processed by the flip-tlop on the falling edge of the
cIock pulse. The clock triggering occurs at a voltage level
and is not directly related to the transition time of the falling
edge of the clock pulse. Data on the J and K inputs may be
changed while the clock is high or low without affecting the
outputs as long as the setup and hold times are not
violated. A low logic level on the preset or clear inputs will
set or reset the outputs regardless of the logic levels of the
other inputs.
Features
ll Alternate Military/Aerospace device (54LS112) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
DuaI-ln-Llne Package
llee CLR1 ELRZ ClKl " " PR2 "
16 IS " 13 12 It l,, S
sy JJ>
I G' F
l 2 3 n 5 s 1 a
CLK 1 KI JI rat at tit 61 Gun
TUF/tt382-t
Order Number 54LS112DMQB, ti4LSt12FMt2B,
54L5112LMGB, DM54LtM12Ad, DM54L8112AW,
DM74LS112AM or DM74LS112AN
See NS Package Number E20A,
J16A, IMBA, N16E or W16A
Function Table
Inputs Outputs
PR cut CLK J K o 6
L H x x x H L
H L x x x L H
L L x x x H' H*
H H l L L On Go
H H l H L H L
H H t L H L H
H H I H H Toggle
H H H x x th a
H -- ngh Logic Level
L a Low Logic Level
x '" Either Low or High Loglc Level
l = Negative Going Edge of Pase
. - This txtntiquratlon is nonembie: that ls, It will not persist when preset
and/or clear inputs return to their Inactive (high) level.
00 = The output logic level before the indicated input conditions were ee-
tablished,
Toggle " Each output changes to the complement tot its previous level on
each tailing edge of the ciock pulse.
VZL l-S'l
LS112A
Absolute Maximum Ratings (Note)
If MllltarylAerospace specified devlces are required,
please contact the National Sttmlettndutttttr Sales
Offkm/Dlatrlttutortt for availability and ttPettit-ttnts.
Note: The "Absolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The de vice should notbe operated at these limits. The
parametric values tiefined in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define
the conditions for acme! device operation.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM54LS and 54LS --55'C to + 125'C
DM74LS
Storage Temperature Range
0''C to + 70'C
-65t to +150'C
Recommended Operating Conditions
Symbol P ar a m at or DM54LS112A DM74Ls112A Unlts
Min Nam Max Mln Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
" High Level Input Voltage 2 2 V
" Low Level Input Voltage 0.7 0.8 V
IOH High Level Output Current -0.4 -0.4 mA
IOL Low Level Output Current 4 8 mA
chK Clock Frequency (Note 2) 0 30 0 30 MHz
chK Clock F requency (Note 3) 0 25 O 25 MHz
tw Pulse Width Clock High 20 20
(Note 2) Preset Low 25 25 ns
Clear Low 25 25
tw Pulse Width Clock High 25 25
(Note 3) Preset Low 30 30 ns
Clear Low 30 30
tsu Setup Time (Notes 1 and 2) 20 I 20 I ns
tsu Setup Time (Notes 1 and 3) 25 l 25 l ns
tH Hold Time (Notes 1 and 2) 0 l 0 l ns
tH Hold Time (Notes 1 and 3) 5 l 5 I ns
TA Free Air Operating Temperature - 55 125 0 70 "C
Note t: The symbol (l) indicates the falling edge of the clock pulse is used for reference.
NotozCL - 15 pF, RL - 2 kn. TA " 25c and vcc - 5V.
Note 3: CL = so pF, h = 2 kn, TA " 290 and voc = 5v.
Electrical Characteristics over recommended optarating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min o2l' 1) Max Unlts
V. InputClamp Voltage Vcc = Min, I. = -18 mA -1.5 V
VOH High Level Output VCC = Min, IOH = Max DM54 2.5 3.4 V
Voltage " = Max,V|H = Min DM74 2.7 3.4
VOL Low LevelOutput Vcc = Min, IOL = Max DM54 0.25 0.4
Voltage " = Max,le = Min DM74 0.35 0.5 V
lot. = 4 mA, Vcc = Min DM74 0.25 0.4
I. Input Current tit Max Vcc = Max, V. = 7V J, K 0.1
Input Voltage
Clear 0.3 m A
Preset 0.3
Clock 0.4
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) (Continued)
Symbol Parameter Condltlons Mln (N ote 1) Max Units
IIH High Level Input Current Vcc =.. Max, V. = 2.7V J, K 20
Clear 60 P A
Preset 60
Clock 80
IIL Low Level Input Current Vcc = Max, V. = 0.4V J, K -0.4
Clear -0.8 m A
Preset - 0.8
Clock -0.8
los Short Circuit Vcc = Max DM54 - 20 - 100 mA
Output Current (Note 2) DM74 _ 20 _ 100
ICC Supply Current Vcc = Max (Note 3) 4 6 mA
Switching Characteristics at Vcc == 5V and TA = 25°C (See Sectiont for TestWavetorms and Output Load)
Ru = 2 kn
From (Input) = =
Symbol Parameter To (Output) th. " pF A. 50 pF Units
Min Max Min Max
fMAx Maximum Clock Frequency 30 25 MHz
tPLH Propagation Delay Time Preset
Low to High Level Output to Q 20 24 ns
tPHL Propagation Delay Time Pretest
High to Low Level Output to Q 20 28 ns
tpLH Propagation Delay Time Clear
Low to High Level Output to Ta 20 24 ns
tPHL Propagation Delay Time Clear
High to Low Level Output to Q 20 28 ns
tPLH Propagation Delay Time Clock to 20 24 ns
Low to High Level Output 0 or G
tpHL Propagation Delay Time Clocklo 20 28 ns
High to Low Level Output Q or Q
Note 1: All typicals are at vac = w, TA = 290.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs, where
shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where Vo - 2.25V and 2.125V for DM54 and
DM74 series, respectively. with the minimum and maximum limits reduced by one half fmm their stated values. TNs Is very useful when using automatic test
equipment
Note 3: With all outputs open. ICC is measured with the Q and 5 outputs high in tum. At the time of measurement the clock is grounded.
VZLlS'I
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
54LS112FMQB - product/54Is112fmqb?HQS=T|-null-null-dscatalog-df-pf-null-wwe
DM74LS112AM - product/dm74ls112am?HQS=T|-nu|I-null-dscataIog-df-pf-null-wwe
DM54LS112AW - product/dm54ls112aw?HQS=T|—nu|I-nuIl-dscataIog-df—pf-null-wwe
DM74LS112AN - product/dm74ls112an?HQS=T|—nuII-nulI-dscataIog-df—pf-null-wwe
DM54LS112AJ - product/dm54ls112aj?HQS=T|-nu|I-null-dscatalog-df-pf-null-wwe
54LS112LMQB - product/54ls112|mqb?HQS=T|-nu|I-nulI-dscatalog-df-pf—null-wwe
54LS112DMQB - product/54ls112qub?HQS=T|-nu|I-nulI-dscatalog-df—pf—nuII-wwe
