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54FCT138N/a1avai1-of-8 Decoder/Demultiplexer


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54FCT138
1-of-8 Decoder/Demultiplexer
TL/F/10657
54FCT138
1-of-8
Decoder/Demultiplexer
April 1993
54FCT138
1-of-8 Decoder/Demultiplexer
General Description
The ’FCT138isa high-speed 1-of-8 decoder/demultiplexer.
This deviceis ideally suitedfor high-speed bipolar memory
chip select address decoding. The multiple input enables
allow parallel expansiontoa 1-of-24 decoder usingjust
three ’FCT138 devicesora 1-of-32 decoder using four
’FCT138 devicesandone inverter.
FACTTM FCT utilizes NSC quiet series technologyto pro-
vide improved quiet output switchingand dynamic threshold
performance.
FACT FCT features GTOTM output control and undershoot
correctorin additiontoa split groundbusfor superior per-
formance.
Features NSC 54FCT138ispinand functionally equivalenttoIDT
54FCT138 Demultiplexing capability Multiple input enablefor easy expansion Active LOW mutually exclusive outputs Input clamp diodesto limitbus reflections TTL/CMOS input and output level compatible32mA (Mil) CMOS power levels ESD immunityt 4kVtyp Military Product compliantto MIL-STD 883 and Stan-
dard Military Drawing Ý5962-87654
Logic Symbols
TL/F/10657–1
IEEE/IEC
TL/F/10657–4
Connection Diagrams
Pin Assignment
forDIPand Flatpak
TL/F/10657–2
Pin Assignment
for LCC
TL/F/10657–3
Pin Names Description
A0–A2 AddressInputs
E1–E2 EnableInputs EnableInput
O0–O7 Outputs
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
FACTTM andGTOTM aretrademarksof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
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