74F574 ,Octal D Flip-Flop with TRI-STATE OutputsFeaturesYInputs and outputs on opposite sides of packageThe ’F574 is a high-speed, low power octal ..
74F574PC ,Octal D-Type Flip-Flop with TRI-STATE OutputsFunctional Description Function TableThe 74F574 consists of eight edge-triggered flip-flops withInp ..
74F574SCX ,Octal D-Type Flip-Flop with 3-STATE OutputsapplicationsThis device is functionally identical to the 74F374 exceptfor the pinouts. Ordering Cod ..
74F574SCX ,Octal D-Type Flip-Flop with 3-STATE Outputs74F574 Octal D-Type Flip-Flop with 3-STATE OutputsApril 1988Revised October 200074F574Octal D-Type ..
74F574SCX ,Octal D-Type Flip-Flop with 3-STATE OutputsFeaturesThe 74F574 is a high-speed, low power octal flip-flop with a
54F574-74F574
Octal D Flip-Flop with TRI-STATE Outputs
TL/F/9567
54F/74F574
Octal
D-Type
Flip-Flop
with
TRI-STATE
Outputs
May 1995
54F/74F574
Octal D-Type Flip-Flop with TRI-STATEÉ Outputs
General Description
The ’F574isa high-speed,low power octal flip-flop witha
buffered common Clock (CP)anda buffered common Out-
put Enable (OE).The information presentedtotheD inputs storedinthe flip-flopsonthe LOW-to-HIGH Clock (CP)
transition.
This deviceis functionally identicaltothe ’F374 exceptfor
the pinouts.
Features Inputs and outputson opposite sidesof package
allowing easy interface with microprocessors Usefulas inputor output portfor microprocessors Functionally identicalto ’F374 TRI-STATE outputsfor bus-oriented applications
Commercial Military Package Package DescriptionNumber
74F574PC N20A 20-Lead (0.300× Wide) Molded Dual-In-Line
54F574DM (Note2) J20A 20-Lead CeramicDual-In-Line
74F574SC (Note1) M20B 20-Lead (0.300× Wide) Molded Small Outline, JEDEC
74F574SJ (Note1) M20D 20-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F574FM(Note2) W20A 20-Lead Cerpack
54F574LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note 1:Devicesalso availablein13×reel. UsesuffixeSCXandSJX.
Note 2:Militarygrade devicewith environmentaland burn-in processing.Use suffixe DMQB, FMQBandLMQB.
Logic Symbols
TL/F/9567–1
IEEE/IEC
TL/F/9567–4
Unit Loading/Fan Out
54F/74F
Pin Names Description U.L. Input IIH/IIL
HIGH/LOW Output IOH/IOL
D0–D7 Data Inputs 1.0/1.0 20 mA/b0.6mA Clock Pulse Input (Active LOW) 1.0/1.0 20 mA/b0.6mA TRI-STATE Output Enable Input (ActiveLOW) 1.0/1.0 20 mA/b0.6mA
O0–O7 TRI-STATE Outputs 150/40 (33.3) b3mA/24mA(20 mA)
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
