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54F20F?N/a100avaiDual 4-Input NAND Gate
54F20FN/a120avaiDual 4-Input NAND Gate


54F20 ,Dual 4-Input NAND Gate
54F20 ,Dual 4-Input NAND Gate
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54F20
Dual 4-Input NAND Gate
TL/F/9462
54F/74F20
Dual
4-Input
NAND
Gate
November 1994
54F/74F20
Dual 4-Input NAND Gate
General Description
This device containstwo independent gates, eachof which
performsthe logic NAND function.
Commercial Military Package Package DescriptionNumber
74F20PC N14A 14-Lead (0.300× Wide)Molded Dual-In-Line
54F20DM (Note2) J14A 14-Lead CeramicDual-In-Line
74F20SC (Note1) M14A 14-Lead (0.150× Wide)Molded SmallOutline, JEDEC
74F20SJ (Note1) M14D 14-Lead (0.300× Wide)Molded SmallOutline, EIAJ
54F20FM(Note2) W14B 14-Lead Cerpack
54F20LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note1: Devicesalso availablein13×reel.Use suffixeSCXandSJX.
Note2: Militarygrade device withenvironmentaland burn-in processing.Use suffixe DMQB, FMQBand LMQB.
Logic Symbol
IEEE/IEC
TL/F/9462–3
Connection Diagrams
Pin Assignment
for DIP, SOICand Flatpak
TL/F/9462–2
Pin Assignment
for LCC
TL/F/9462–1
Unit Loading/Fan Out
54F/74F
Pin Names Description U.L. Input IIH/IIL
HIGH/LOW Output IOH/IOL
An,Bn,Cn,Dn Inputs 1.0/1.0 20 mA/b0.6mA Outputs 50/33.3 b1mA/20mA
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
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