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54F193DC
Up/Down Binary Counter with Separate Up/Down Clocks
TL/F/9497
54F/74F193
Up/Down
Binary
Counter
with
Separate
Up/Down
Clocks
November 1994
54F/74F193 Up/Down Binary Counter
with Separate Up/Down Clocks
General Description
The ’F193isan up/down modulo-16 binary counter. Sepa-
rate CountUp and Count Down Clocksare used, andin
either counting modethe circuits operate synchronously.
The outputs change state synchronously withthe LOW-to-
HIGH transitionsonthe clock inputs. Separate Terminal
CountUp and Terminal Count Down outputsare provided
thatare usedasthe clocksfor subsequent stages without
extra logic, thus simplifying multi-stage counter designs.
Individual preset inputs allowthe circuittobe usedasa
programmable counter. Boththe Parallel Load (PL)andthe
Master Reset (MR) inputs asynchronously override the
clocks.
Features Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F193PC N16E 16-Lead (0.300× Wide) Molded Dual-In-Line
54F193DM (Note2) J16A 16-Lead CeramicDual-In-Line
74F193SC (Note1) M16A 16-Lead (0.150× Wide) Molded Small Outline, JEDEC
74F193SJ (Note1) M16D 16-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F193FM(Note2) W16A 16-Lead Cerpack
54F193LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note 1:Devicesalso availablein13×reel. UsesuffixeSCXandSJX.
Note 2:Militarygrade devicewith environmentaland burn-in processing.Use suffixe DMQB, FMQBandLMQB.
Logic Symbols Connection Diagrams
TL/F/9497–1
IEEE/IEC
TL/F/9497–4
Pin Assignment
for DIP, SOICand Flatpak
TL/F/9497–2
Pin Assignment
for LCC
TL/F/9497–3
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
