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54F189DLQB
64-Bit Random Access Memory with TRI-STATE Outputs
TL/F/9493
54F/74F189
64-Bit
Random
Access
Memory
with
TRI-STATE
Outputs
August 1995
54F/74F189 64-Bit Random Access
Memory with TRI-STATEÉ Outputs
General Description
The ’F189isa high-speed 64-bit RAM organizedasa16-
wordby 4-bit array. Address inputsare bufferedto minimize
loadingandare fully decoded on-chip.The outputsare TRI-
STATE andareinthe high impedance state wheneverthe
Chip Select (CS) inputis HIGH.The outputsare active only
inthe Read modeandthe outputdataisthe complementof
the stored data.
Features TRI-STATE outputsfor databus applications Buffered inputs minimize loading Address decoding on-chip Diode clamped inputs minimize ringing Availablein SOIC, (300mil only)
Commercial Military Package Package DescriptionNumber
74F189PC N16E 16-Lead (0.300× Wide)Molded Dual-In-Line
54F189DL (Note2) J16A 16-Lead CeramicDual-In-Line
74F189SC(Note1) M16A 16-Lead (0.150× Wide)Molded Small Outline, JEDEC
74F189SJ (Note1) M16D 16-Lead (0.300× Wide)Molded Small Outline, EIAJ
54F189FL(Note2) W16A 16-Lead Cerpack
54F189LL (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note1: Devicesalso availablein13×reel.Use suffixeSCXandSJX.
Note2: Militarygrade devicewith environmentaland burn-in processing.Use suffixe DLQB, FLQBand LLQB.
Logic Symbols Connection Diagrams
TL/F/9493–1
IEEE/IEC
TL/F/9493–4
Pin Assignment
for DIP, SOICand Flatpak
TL/F/9493–2
Pin Assignment
for LCC
TL/F/9493–3
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
