74F175 ,Quad D Flip-Flop54F/74F175QuadDFlip-FlopNovember199454F/74F175QuadDFlip-FlopGeneralDescription
74F175A ,Quad D flip-flop
74F175AD ,Quad D flip-flop
74F175AN ,Quad D flip-flop
74F175AN ,Quad D flip-flop
74F175PC ,Quad D Flip-FlopFunctional Description Truth TableThe 74F175 consists of four edge-triggered D-type flip-Inputs Out ..
74HCT373D ,Octal D-type transparent latch; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT373DB ,Octal D-type transparent latch; 3-stateapplications3-state true outputs. When LE is HIGH, data at the Dn• Common 3-state output enable inp ..
74HCT373N ,74HC/HCT373; Octal D-type transparent latch; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT373PW ,Octal D-type transparent latch; 3-stateFEATURES input and an output enable (OE) input are common to alllatches.• 3-state non-inverting out ..
74HCT374D ,Octal D-type flip-flop; positive edge-trigger; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT374DB ,Octal D-type flip-flop; positive edge-trigger; 3-stateGENERAL DESCRIPTIONThe “374” is functionally identical to the “534”, but hasThe 74HC/HCT374 are hig ..
54F175-74F175
Quad D Flip-Flop
TL/F/9490
54F/74F175
Quad
Flip-Flop
November 1994
54F/74F175 QuadD Flip-Flop
General Description
The ’F175isa high-speed quadD flip-flop. The deviceis
usefulfor general flip-flop requirements where clock and
clear inputsare common.The informationontheD inputsis
stored duringthe LOW-to-HIGH clock transition. Bothtrue
and complemented outputsof each flip-flopare provided.A
Master Reset input resetsall flip-flops, independentofthe
ClockorD inputs, LOW.
Features Edge-triggered D-type inputs Buffered positive edge-triggered clock Asynchronous common reset Trueand complement output Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F175PC N16E 16-Lead (0.300× Wide) Molded Dual-In-Line
54F175DM (Note2) J16A 16-Lead CeramicDual-In-Line
74F175SC (Note1) M16A 16-Lead (0.150× Wide) Molded Small Outline, JEDEC
74F175SJ (Note1) M16D 16-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F175FM(Note2) W16A 16-Lead Cerpack
54F175LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note 1:Devicesalso availablein13×reel. UsesuffixeSCXandSJX.
Note 2:Militarygrade devicewith environmentaland burn-in processing.Use suffixe DMQB, FMQBandLMQB.
Logic Symbols Connection Diagrams
IEEE/IEC
TL/F/9490–5
Pin Assignmentfor
DIP,SOICand Flatpak
TL/F/9490–1
Pin Assignment
for LCC
TL/F/9490–2
TL/F/9490–3
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
