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54F164ADM
Serial-In, Parallel-Out Shift Register
TL/F/10613
54F/74F164A
Serial-In,
Parallel-Out
Shift
Register
January 1995
54F/74F164A
Serial-In, Parallel-Out Shift Register
General Description
The ’F164Aisa high-speed 8-bit serial-in/parallel-out shift
register. Serial datais entered througha 2-input AND gate
synchronous withthe LOW-to-HIGH transitionofthe clock.
The device featuresan asynchronous Master Reset which
clearsthe register, settingall outputs LOW independentof
the clock.The ’F164Aisa faster versionofthe ’F164.
Features Typical shift frequencyof90 MHz Asynchronous Master Reset Gated serial data input Fully synchronous data transfers Guaranteed 4000Vmin ESD protection ’F164Aisa faster versionofthe ’F164
Commercial Military Package Package DescriptionNumber
74F164APC N14A 14-Lead(0.300× Wide) Molded Dual-In-Line
54F164ADM (Note2) J14A 14-LeadCeramic Dual-In-Line
74F164ASC (Note1) M14A 14-Lead(0.150× Wide) Molded Small Outline,JEDEC
74F164ASJ(Note1) M14D 14-Lead(0.300× Wide) Molded Small Outline,EIAJ
74F164AFM (Note2) W14B 14-LeadCerpack
74F164ALM (Note2) E20A 20-LeadCeramic Leadless ChipCarrier, TypeC
Note1: Devicesalso availablein13×reel.Use suffixeSCXandSJX.
Note2: Military grade devicewith environmental andburn-in processing.Usesuffixe DMQB, FMQBand LMQB.
Logic Symbols
TL/F/10613–1
IEEE/IEC
TL/F/10613–4
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
