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JM38510/33001B2A |JM3851033001B2AN/a1avaiQuad 2-Input NAND Gate
JM38510/33001BDA |JM3851033001BDANSCN/a13avaiQuad 2-Input NAND Gate
54F00DMQBFN/a20avaiQuad 2-Input NAND Gate


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54F00DMQB-JM38510/33001B2A-JM38510/33001BDA
Quad 2-Input NAND Gate
54F/74F00
Quad 2-Input NAND Gate
General Description

This device contains four independent gates, eachof which
performsthe logic NAND function.
Features
Guaranteed 4000V minimum ESD protection
Ordering Code:
See Section0
Commercial Military Package Package Description
Number

74F00PC N14A 14-Lead (0.300" Wide) Molded Dual-In-Line
54F00DM (Note2) J14A 14-Lead Ceramic Dual-In-Line
74F00SC (Note1) M14A 14-Lead (0.150" Wide) Molded Small Outline, JEDEC
74F00SJ (Note1) M14D 14-Lead (0.300" Wide) Molded Small Outline, EIAJ
54F00FM (Note2) W14B 14-Lead Cerpack
54F00LM (Note2) E20A 20-Lead Ceramic Leadless Chip Carrier, TypeC
Note1:
Devicesalso availablein13"reel.Use suffix= SCXandSJX.
Note2:
Military gradedevicewith environmentaland burn-in processing. Usesuffix= DMQB, FMQBand LMQB.
Logic Symbol Connection Diagrams

TRI-STATEĀ®isa registeredtrademark ofNationalSemiconductor Corporation.
IEEE/IEC

DS009454-3
Pin Assignment
for DIP, SOIC and Flatpak

DS009454-2
Pin Assignment
for LCC

DS009454-1
December 1994
54F/74F00
Quad
2-Input
NAND
Gate
54F/74F00
1997NationalSemiconductor Corporation DS009454 1
DSXXX
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