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5474
Dual Positive-Edge Triggered D Flip-Flop with Preset, Clear and Complementary Outputs
TL/F/6526
5474/DM5474/DM7474
Dual
Positive-Edge-Triggered
Flip-Flops
with
Preset,
Clear
and
Complementary
Outputs
June 1989
5474/DM5474/DM7474
Dual Positive-Edge-TriggeredD Flip-Flops
with Preset, Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
geredD flip-flopswith complementary outputs.The informa-
tionontheD inputis acceptedbythe flip-flopsonthe posi-
tive going edgeof theclock pulse.The triggeringoccursata
voltage levelandisnot directly relatedtothe transition timethe rising edgeofthe clock. The dataontheD input may changed whilethe clockislowor high without affecting
the outputsas longasthe datasetupand hold times arenot
violated.Alow logic levelonthe presetor clear inputswill
setor resetthe outputs regardlessofthe logic levelsofthe
other inputs.
Features Alternate Military/Aerospace device (5474)is available.
Contacta National Semiconductor Sales Office/Distrib-
utorfor specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6526–1
Order Number 5474DMQB, 5474FMQB,DM5474J, DM5474W, DM7474Mor DM7474N
SeeNS Package Number J14A,M14A, N14Aor W14B
Function Table
Inputs Outputs CLR CLK D Q Q X X H L X X L H X X H* H* u HH L u LL H L X Q0 Q0eHigh Logic Levele EitherLow orHighLogicLeveleLow Logic Levelue Positive-goingtransitionofthe clock.eThis configurationis nonstable;thatis,itwill notpersistwheneitherthe preset and/orclear
inputs returntotheir inactive (high)level.eThe outputlogiclevel ofQbeforethe indicatedinput conditionswere established.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
