DM74163AN ,7 V, synchronous 4-bit counterElectrical Characteristics"
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54161DMQB-DM74161AN-DM74163AN
7 V, synchronous 4-bit counter
National
1 Semiconductor
54161/DM54161A/DM74161A
DM54163A/DM74163A Synchronous 4-Bit Counters
General Description
These synchronous, presettable counters feature an inter-
nal carry look-ahead for application in high-speed counting
designs. The 161A and 163A are 4-bit binary counters. The
carry output is decoded by means of a NOR gate, thus pre-
venting spikes during the normal counting mode of opera-
tion. Synchronous operation is provided by having all flip-
flops clocked simultaneously so that the outputs change co-
incident with each other when so instructed by the count-
enable inputs and internal gating. This mode of operation
eliminates the output counting spikes which are normally
associated with asynchronous (ripple clock) counters. A
buffered clock input triggers the four flip-flops on the rising
(positive-going) edge of the clock input waveform.
These counters are fully programmable; that is, the outputs
may be preset to either level, As presetting is synchronous,
setting up a low level at the load input disables the counter
and causes the outputs to agree with the setup data after
the next clock pulse. regardless of the levels of the enable
input. Low-to-high transitions at the load input of the 161A
and 163A are perfectly acceptable, regardless of the logic
levels on the clock or enable inputs. The clear function for
the 161A is asynchronous; and a low level at the clear input
sets all four of the flpfiop outputs low, regardless of the
levels of clock, load, or enable inputs. The clear function for
the 163A is synchronous; and a low level at the clear input
sets all four of the flip-flop outputs low after the next clock
pulse, regardless of the levels of the enable inputs. This
synchronous clear allows the count length to be modified
easily, as decoding the maximum count desired can be aw
complished with one external NAND gate. The gate out.
put is connected to the clear input to synchronously clear
the counter to all low outputs. Low-to-high transitions at the
clear input of the 163A are also permissible. regardless of
the logic levels on the clock, enable. or load inputs.
The carry look-ahead circuitry provides for cascading coun-
ters for n-bit synchronous applications without additional
gating. Instrumental in accomplishing this function are two
count-enable inputs and a ripple carry output. Both count-
enable inputs (P and T) must be high to count, and input T is
fed forward to enable the ripple carry output. The ripple car-
ry output thus enabled will produce a high-level output pulse
with a duration approximately equal to the high-level portion
of the QA output. This high-level overflow ripple carry pulse
can be used to enable successive cascaded stages. High-
to-low-level transitions at the enable P or T inputs of the
161A through 163A may occur, regardless of the logic level
on the clock.
Features
Synchronously programmable
Internal look-ahead for fast counting
Carry output for n-bit cascading
Synchronous counting
Load control line
Diode-clamped inputs
Alternate Military/Aerospace device (54161) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-ln-Llne Package
RIPPLE
Vcc 0mm 0. q,
[is 15 14 13
OUTPUTS
CARRY f '
ENABLE
tle on T LOAD
12 1 1 10 I 9
I 1 2 3 4
CLEAR CLOCK A a
s 6 'ls
C D ENABLE (mi)
DATA INPUTS
Order Number 54161DMQB, 54161FMQB, DM54161AJ, DM54161AW,
DM54163AJ, DM54163AW, DM74161AN or DM74163AN
See NS Package Number J16A, N16E or W16A
TL/F16551-1
V89l. o Vl9l-
161A 0 163A
Absolute Maximum Ratings (Note)
If MliltaryfAarottpatttt spocmed devlcen are required,
please contact the Nallonal Semiconductor Sales
offlttefDlatributort, for availability and speclflcations.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
DM54 and 54
Storage Temperature Range
--55''C to + 125''C
ty'C to + 70'C
-65'C to + 1 50°C
Recommended Operating Conditions
Note: The "Absolute Maximum Ratings" are those values
beyond which (he safety of the device cannot be guaran-
teed. The de vice should not be operated at these limits. The
parametric values dttfinad in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions " table " tietine
the conditions for acme! device operation.
DM54161A and 163A DM74161A and 163A
Symbol Parameter Unlts
Min Nom Max Mln Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
Ihr., High Level Input Voltage 2 2 V
" Low Level Input Voltage 0.8 0.8 V
IOH High Level Output Current - 0.8 - 0.8 mA
IOL Low Level Output Current 16 16 tttA
tcut Clock Frequency (Note 6) 0 25 O 25 MHz
tw Pulse Width Clock 25 25
(Note 6) Clear 20 20
tsu Setup Time Data 20 20
(Note 6) Enable P 34 34 ns
Load 25 25
Clear (Note 5) 20 20
tH Hold Time (Note 6) 0 ns
TA Free Air Operating Temperature - 55 125 0 70 "C
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Mln Typ Max Units
(Note 1)
V. Input Clamp Voltage Voc = Min, 1. = - 12 mA - 1.5 V
VOH High Level Output Voc = Min, IOH = Max 2 4 3 4 V
Voltage W. = Max, Ihr, = Min . .
VOL Low Level Output Vcc = Min, IOL = Max 0 2 0 4 V
Voltage VIH = Min, " = Max . .
I. 1nputCurrsnt@ Max Vcc = Max, VI = 5.5V
1 tttA
Input Voltage
IIH High Level Input Voc = Max EnabltsT 80
Current v. = 2.4V Clock 80 “A
Others 40
IIL Low Level Input Vcc == Max Enable T -3.2
Current v. = 0.4V Clock - 3.2 mA
Others - 1.6
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted) (Continued)
Symbol Parameter Conditions (N11: " Max Units
los Short Circuit Vcc = Max DM54 -20 - 57 mA
Output Current (Note 2) DM74 _ 20 _ 57
ICCH Supply Current Vcc = Max DM54 59 85 m A
with Outputs High (Note 3) DM74 59 94
ICCL Supply Current Vcc = Max DM54 63 91 m A
with Outputs Low (Note 4) DM74 63 101
Note t: All typicals are at Vcc = 5V, TA = 25"C.
Note 2: Not more than one output should be shorted at a time.
Note 3: Ice“ is measured with the LOAD high, then again with the LOAD low, with all inputs high and all outputs open.
Note 4: Icel. is measured with the CLOCK high, then again with the CLOCK input low, with all inputs low and all outputs open.
Note s.. Applies to '163A which has synchronous clear inputs.
Note 6: TA = 25%: and vcc = 5V.
Switching Characteristics at Vcc = 5V and TA = 25°C (See Section 1 for Test Waveforms and Output Load)
From (Input)
RL = 400ft,CL = " pF
Symbol Parameter Units
To (Output) Min Max
iMAx Maximum Clock 25 MHz
Frequency
tpLH Propagation Delay Time Clock to 27 ns
Low to High Level Output Ripple Carry
tpHL Propagation Delay Time Clock to 24 ns
High to Low Level Output Ripple Carry
tpLH Propagation Delay Time Clock 20 ns
Low to High Level Output (Load High) to Q
tPHL Propagation Delay Time Clock 32 ns
High to Low Level Output (Load High) to O
tpLH Propagation Delay Time Clock 21 ns
Low to High Level Output (Load Low) to Q
tpHL Propagation Delay Time Clock 32 ns
High to Low Level Output (Load Low) to Q
tPLH Propagation Delay Time Enable T to 1 6 ns
Low to High Level Output Ripple Carry
tpHL Propagation Delay Time Enable T to 1 6 ns
High to Low Level Output Ripple Carry
tpHL Propagation Delay Time Clear (Note 7) 36 ns
High to Low Level Output to Q
Note 7: Propagation delay for clearing is measured from the clear input tor the 161A or trom the clock input transition for the 163A.
V891 0 Vl9l.
161A 0 163A
Logic Diagrams
DATA h
DATA il
ENABLE P
ENABLE T
DATA C
DATA o
(15) RIPPLE
OUTPUT
TL/F/6551-3
Logic Diagrams (Continued)
DATA A
DATA 8
ENABLE P
ENABLET
DATA C
DATA l)
(15) RIPPLE
OUTPUT
TL/F/ 8551 -8
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Parameter Measurement Information
Switching Tlme Waveforms
- ‘w (CLOCK)
tirl,tirt VREF Vnzr VREF Vasr
ov -s"
tro, t
(MEASURE AT t", 1) ' PHL
(MEASURE AT ttte a)
OUTPgT l/or, ( / N
A VOL -Ll F---
(HEASURE AT ttso w)
OUTPUT Yor,
q, VHF
(MEASURE AT tee 8)
1 tru,
(MEASURE AT ta, 2)
(MEASURE AT tr" o)
OUTPUT v0”
0 VRSF VREF
(MEASURE AT ho 10 l , tn”
0R inns) (N0TE B) (MEASURE AT ia. tr)
OUTPUT lltm
h VREF
VOL 2: 1.,“
‘an (MEASURE AT ttte 10
0R t NOTE il
OUTPUT VoL 7 ,
TLIF/6551 -6
Not. A: The Irtthtt pulses are supplied by generators having the foilowing characteristics: PRR s; 1 MHz, duty cycle C 50%, zour = son. For 161A and 163A,
tr s 10 ns. t, s 10 M. Vary PRR to measure tMAX.
Nolo B: Outputs OD and carry are tested at tn+15 for 181A, 163A where In is the bit time when all outputs are low.
Not. e For 161A and 163A, VREF = 1.5V.
V89l 0 Vl-9l
161A 9 163A
Parameter Measurement Information (Continued)
CLOCK INPUT
I 61 A
DATA INPUTS
A, B. C AND D
tl OUTPUTS
ENABLE P OR
ENABLE T
CLOCK INPUT
Q OUTPUTS
Swltchlng Tlme Waveforms
VREF S VREF [Van
oy K 7
hrtcuxz)
VREF Ve /s
tu--- t
3.0Y Mum)
Par [Vnsr
3.OY ism»
- tna - - teu,
httr VRD’
-tsmv--
CL...,,,,,;"' very N VREF [VREF
tN -\_/
- ‘PHL - bu,
Van" VREF
- ‘PHL V-- - tpu,
(MEASURE AT tree on tard
TL/F/656t-7
Note A: The input pulses are supplied by generators having me following characteristics: PRR s 1 MHz. duty cyde s 50%, Zour A.' 500. For 161A and
163A, tr s 10 ns, t, s 10 ns. Vary PRR to measure tMAX.
Nttttt B.. Enable P and enable T setup times are measured at tn + o-
Noto c: For 161A and 163A, VREF = 1.5V.
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
DM74163AN - product/dm74163an?HQS=TI-nu|I-nulI-dscatalog-df-pf-nulI-wwe
DM74161AN - product/dm74161an?HQS=T|—nu|I-nulI-dscatalog-df-pf-nulI-wwe
DM54161AW - product/dm54161aw?HQS=T|-nulI-nulI-dscatalog-df—pf—nuII-wwe
DM54161AJ - product/dm54161aj?HQS=T|—nuII-nu|I-dscataIog-df-pf-nuII-wwe
54161 FMQB - product/54161fmqb?HQS=T|-nu|I-nu|I-dscataIog-df-pf-null-wwe
54161DMQB - product/54161dmqb?HQS=TI-nu|I-nu|I-dscatalog-df-pf-nuII-wwe
