29F52 ,8-Bit Registered Transceiver (Inverting)
29F52 ,8-Bit Registered Transceiver (Inverting)29F52 29F538-BitRegisteredTransceiver#January199529F52 29F53#8-BitRegisteredTransceiverGeneralDescr ..
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2DA1213Y-13 , PNP SURFACE MOUNT TRANSISTOR
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2SB772S , TECHNICAL SPECIFICATIONS OF PNP EPITAXIAL PLANAR TRANSISTOR
2SB774 ,Small-signal deviceAbsolute Maximum Ratings T = 25°CaParameter Symbol Rating Unit+0.15 +0.150.45 0.45–0.1 –0.1Collect ..
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29F52
8-Bit Registered Transceiver (Inverting)
29F52 • 29F53 8-Bit Registered Transceiver April 1988 Revised September 2000 29F52 29F53 8-Bit Registered Transceiver General Description Features The 29F52 and 29F53 are 8-bit registered transceivers.8-bit registered transceivers Two 8-bit back to back registers store data flowing in bothSeparate clock, clock enable and 3-STATE output directions between two bidirectional buses. Separate clock, enable provided for each register clock enable and 3-STATE output enable signals are pro- AMD Am2952/2953 functional equivalents vided for each register. The A –A output pins are guaran- 0 7 Both inverting and non-inverting options available teed to sink 24 mA while the B –B output pins are 0 7 24-Pin slimline package designed for 64 mA. The 29F53 is an inverting option of the 29F52. Both trans- ceivers are AMD Am2952/2953 functional equivalents. Ordering Code: Order Number Package Number Package Description 29F52SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 29F52SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 29F53SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols 29F52 29F53 IEEE/IEC IEEE/IEC 29F53 29F52 © 2000 DS009606