27C801 Fast Delivery |IC PHOENIX CO.,LIMITED

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27C801
8 Mbit 1Mb x 8 UV EPROM and OTP EPROM
1/16March 2000
M27C801 Mbit (1Mbx 8) UV EPROM and OTP EPROM 5V± 10% SUPPLY VOLTAGEin READ
OPERATION ACCESS TIME: 45ns LOW POWER CONSUMPTION: Active Current 35mAat 5MHz Standby Current 100μA PROGRAMMING VOLTAGE: 12.75V± 0.25V PROGRAMMING TIME: 50μs/word ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 42h
DESCRIPTION
The M27C801isan8 Mbit EPROM offeredinthe
two rangesUV (ultra violet erase) and OTP (one
time programmable).Itis ideally suitedfor applica-
tions where fast turn-around and pattern experi-
mentation are important requirements andis
organizedas 1,048,576by8 bits.
The FDIP32W (window ceramic frit-seal package)
has transparentlid which allowsthe usertoex-
posethe chipto ultraviolet lightto erasethebit pat-
tern.A new pattern can thenbe writtento the
deviceby followingthe programming procedure.
For applications wherethe contentis programmed
only one time and erasureis not required, the
M27C801is offeredin PDIP32, PLCC32 and
TSOP32(8x20 mm) packages.
FDIP32W(F)
PLCC32(C) TSOP32(N)x20mm
PDIP32(B)
Figure1. Logic Diagram
AI01267
A0-A19 Q0-Q7
VCC
M27C801
VSS
GVPP
M27C801
2/16
Figure2C. TSOP Connections A3
A13
A10
A14
A11 GVPP
A17
A18
A16
A12
A19CC
A15
AI01269
M27C801
(Normal) 17
VSS
Figure2B. PLCC Connections
AI01814
A17
A10Q2 Q3Q4
A18
A16
A11
A13
A12
A19V
M27C801
A15
A14
GVPP
Figure2A. DIP Connections
A13
A10
A14
A11
GVPPQ1VSS
A17
A18A16
A12
A19 VCC
A15
AI01268
M27C8018
Table1. Signal Names
A0-A19 Address Inputs
Q0-Q7 Data Outputs Chip Enable
GVPP Output Enable/ Program Supply
VCC Supply Voltage
VSS Ground
3/16
M27C801
Table2. Absolute Maximum Ratings(1)
Note:1. Exceptforthe rating ”Operating Temperature Range”, stressesabove those listedinthe Table ”Absolute Maximum Ratings”may
cause permanent damagetothe device. Theseare stress ratingsonlyand operationofthe device attheseor anyother conditions
above those indicatedinthe Operating sectionsofthis specificationisnot implied. Exposure toAbsolute Maximum Rating condi-
tionsfor extended periodsmay affect device reliability. Referalsotothe STMicroelectronics SUREProgram andotherrelevantqual-
ity documents. MinimumDC voltageon Inputor Outputis –0.5Vwith possible undershootto –2.0Vfora periodlessthan 20ns. MaximumDC
voltageon OutputisVCC +0.5Vwith possible overshoottoVCC+2Vfora periodless than20ns. Dependson range.
Table3. Operating Modes
Note:X=VIHor VIL,VID=12V± 0.5V.
Table4. Electronic Signature
Symbol Parameter Value Unit Ambient Operating Temperature(3) –40to125 °C
TBIAS Temperature Under Bias –50to125 °C
TSTG Storage Temperature –65to150 °C
VIO(2) Inputor Output Voltage (exceptA9) –2to7 V
VCC Supply Voltage –2to7 V
VA9(2) A9 Voltage –2to 13.5 V
VPP Program Supply Voltage –2to14 V
Mode E GVpp A9 Q7-Q0
Read VIL VIL X DataOut
Output Disable VIL VIH X Hi-Z
Program VIL Pulse VPP X DataIn
Program Inhibit VIH VPP X Hi-Z
Standby VIH X X Hi-Z
Electronic Signature VIL VIL VID Codes
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’sCode VIL 001 000 00 20h
Device Code VIH 010 000 10 42h
M27C801
4/16
DEVICE OPERATION
The operating modesofthe M27C801are listedin
the Operating Modes table.A single power supply requiredin the read mode.All inputsare TTL
levels exceptfor GVPP and 12VonA9for Elec-
tronic Signature and Margin ModeSetor Reset.
Read Mode
The M27C801 has two control functions, bothof
which mustbe logically activein orderto obtain
dataatthe outputs. Chip Enable(E)isthe power
control and shouldbe usedfor device selection.
Output Enable(G)isthe output control and should usedto gate datatothe output pins, indepen-
dentof device selection. Assuming thatthe ad-
dresses are stable, the address access time
(tAVQV)is equalto the delay fromEto output
(tELQV). Datais availableatthe output aftera delay tGLQV fromthe falling edgeofG, assuming that has beenlow andthe addresses have been sta-
bleforat least tAVQV-tGLQV.
Standby Mode
The M27C801 hasa standby mode which reduces
the supply current from 35mAto 100μA.
The M27C801is placedinthe standby modeby
applyinga CMOS high signaltotheE input. Whenthe standby mode,the outputsareina highim-
pedance state, independentofthe GVPP input.
Table5.AC Measurement Conditions
High Speed Standard
Input RiseandFall Times ≤ 10ns ≤ 20ns (10%to 90%)
Input Pulse Voltages 0to3V 0.4to 2.4V
Inputand Output Timing Ref. Voltages 1.5V 0.8and2V
Figure3.AC Testing Input Output Waveform
AI01822
High Speed
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure4.AC Testing Load Circuit
AI01823B
1.3V
OUT= 30pFfor HighSpeed= 100pFfor Standard includesJIG capacitance
3.3kΩ
1N914
DEVICE
UNDER
TEST
Table6. Capacitance(1)(TA =25°C,f=1 MHz)
Note:1. Sampledonly,not 100% tested.
Symbol Parameter Test Condition Min Max Unit
CIN Input Capacitance VIN =0V 6pF
COUT Output Capacitance VOUT =0V 12 pF
5/16
M27C801
Table7. Read ModeDC Characteristics(1)
(TA=0to70°Cor –40to85°C; VCC =5V± 10%)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. MaximumDC voltageon OutputisVCC +0.5V.
Table8A. Read ModeAC Characteristics(1)
(TA=0to70°Cor –40to85°C; VCC =5V± 10%)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested. Speed obtainedwithHigh SpeedAC measurement conditions.
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0V≤VIN≤VCC ±10 μA
ILO Output Leakage Current 0V≤ VOUT≤VCC ±10 μA
ICC Supply Current E= VIL,GVPP =VIL,
IOUT= 0mA,f= 5MHz 35 mA
ICC1 Supply Current (Standby)TTL E=VIH 1mA
ICC2 Supply Current (Standby) CMOS E>VCC– 0.2V 100 μA
IPP Program Current VPP =VCC 10 μA
VIL InputLow Voltage –0.3 0.8 V
VIH(2) Input High Voltage 2 VCC+1 V
VOL Output Low Voltage IOL= 2.1mA 0.4 V
VOH
Output High VoltageTTL IOH= –1mA 3.6 V
Output High Voltage CMOS IOH= –100μAVCC–0.7 V
Symbol Alt Parameter Test
Condition
M27C801
Unit-45(3) -60 -70
Min Max Min Max Min Max
tAVQV tACC Address Validto Output Valid E=VIL,
GVPP =VIL 45 60 70 ns
tELQV tCE Chip Enable Lowto Output Valid GVPP =VIL 45 60 70 ns
tGLQV tOE Output EnableLowto Output Valid E=VIL 25 30 35 ns
tEHQZ(2) tDF Chip Enable Highto OutputHi-Z GVPP =VIL 025 0 25 030 ns
tGHQZ(2) tDF Output Enable Highto Output Hi-Z E=VIL 025 0 25 030 ns
tAXQX tOH Address Transitionto Output
TransitionVIL,
GVPP =VIL 000 ns
Two Line Output Control
Because EPROMs are usually usedin larger
memory arrays,the product featuresa2 line con-
trol function which accommodatesthe useof mul-
tiple memory connection. The two line control
function allows:the lowest possible memory power dissipation, complete assurance that output bus contention
willnot occur.
For the most efficient useof these two control
lines,E shouldbe decoded and usedasthe prima- device selecting function, whileG shouldbe
madea common connectiontoall devicesinthe
array and connectedto the READ line fromthe
system control bus. This ensures thatall deselect- memory devicesarein their lowpower standby
mode and that the output pins are only active
when datais required froma particular memory
device.
M27C801
6/16
Figure5. Read ModeAC Waveforms
AI01583B
tAXQX
tEHQZ
A0-A19
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Table8B. Read ModeAC Characteristics(1)
(TA=0to70°Cor –40to85°C; VCC =5V± 10%)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
Symbol Alt Parameter Test Condition
M27C801
Unit-80 -100/-120/-150
Min Max Min Max
tAVQV tACC Address Validto Output Valid E= VIL,GVPP =VIL 80 100 ns
tELQV tCE Chip EnableLowto Output Valid GVPP =VIL 80 100 ns
tGLQV tOE Output EnableLowto Output
Valid E=VIL 40 50 ns
tEHQZ(2) tDF Chip Enable Highto Output Hi-Z GVPP =VIL 0 35 0 40 ns
tGHQZ(2) tDF Output Enable Highto Output
Hi-Z E=VIL 0 35 0 40 ns
tAXQX tOH Address Transitionto Output
Transition E= VIL,GVPP =VIL 00 ns
System Considerations
The power switching characteristicsof Advanced
CMOS EPROMs require careful decouplingofthe
devices. The supply current, ICC, has three seg-
ments thatareof interesttothe system designer:
the standby current level,the active current level,
and transient current peaks thatare producedby
the falling and rising edgesofE. The magnitudeof
the transient current peaksis dependentonthe
capacitive and inductive loadingofthe deviceat
the output. The associated transient voltage peaks
canbe suppressedby complying withthetwoline
output controlandby properly selected decoupling
capacitors.Itis recommended thata 0.1μF ceram- capacitorbe usedon every device between VCC
and VSS. This shouldbea high frequency capaci-
torof low inherent inductance and shouldbe
placedas closetothe deviceas possible.In addi-
tion,a 4.7μF bulk electrolytic capacitor shouldbe
used between VCC and VSSfor every eight devic-
es. The bulk capacitor shouldbe located nearthe
power supply connection point. The purposeofthe
bulk capacitoristo overcome the voltage drop
causedbythe inductive effectsof PCB traces.
7/16
M27C801
Table9. Programming ModeDC Characteristics(1)
(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP.
Table10. MARGIN MODEAC Characteristics(1)
(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP.
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current VIL≤VIN≤VIH ±10 μA
ICC Supply Current 50 mA
IPP Program Current E=VIL 50 mA
VIL InputLow Voltage –0.3 0.8 V
VIH Input High Voltage 2 VCC+0.5 V
VOL Output Low Voltage IOL= 2.1mA 0.4 V
VOH Output High VoltageTTL IOH= –1mA 3.6 V
VID A9 Voltage 11.5 12.5 V
Symbol Alt Parameter Test Condition Min Max Unit
tA9HVPH tAS9 VA9 HightoVPP High 2 μs
tVPHEL tVPS VPP Highto Chip EnableLow 2 μs
tA10HEH tAS10 VA10 Highto Chip Enable High (Set) 1 μs
tA10LEH tAS10 VA10 Lowto Chip Enable High (Reset) 1 μs
tEXA10X tAH10 Chip Enable Transitionto VA10 Transition 1 μs
tEXVPX tVPH Chip Enable TransitiontoVPP Transition 2 μs
tVPXA9X tAH9 VPP TransitiontoVA9 Transition 2 μs
Programming
When delivered (and after each erasureforUV
EPROM),all bitsofthe M27C801 arein the’1’
state. Datais introducedby selectively program-
ming ’0’s intothe desiredbit locations. Although
only’0’willbe programmed, both’1’sand’0’s can presentin the data word. The only wayto
changea’0’toa’1’isbydie exposureto ultraviolet
light (UV EPROM). The M27C801isin the pro-
gramming mode when VPP inputisat 12.75V andis pulsedto VIL. The datatobe programmedis
appliedto8 bitsin paralleltothe data output pins.
The levels requiredfor the address and datain-
puts are TTL. VCCis specifiedtobe 6.25V±
0.25V.
M27C801
8/16
Figure6. MARGIN MODEAC Waveforms
Note:A8 Highlevel=5V;A9Highlevel=12V.
AI00736B
tA9HVPH tVPXA9X
GVPP
A10Set
VCC
tVPHEL
tA10LEH
tEXVPX
tA10HEH
A10 Reset
tEXA10X
Table11. Programming ModeDC Characteristics(1)
(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.75V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
Symbol Alt Parameter Test Condition Min Max Unit
tAVEL tAS Address Validto Chip Enable Low 2 μs
tQVEL tDS Input Validto Chip EnableLow 2 μs
tVCHEL tVCS VCC Highto Chip Enable Low 2 μs
tVPHEL tOES VPP Highto Chip EnableLow 2 μs
tVPLVPH tPRT VPP Rise Time 50 ns
tELEH tPW Chip Enable Program Pulse Width (Initial) 45 55 μs
tEHQX tDH Chip Enable Highto Input Transition 2 μs
tEHVPX tOEH Chip Enable HightoVPP Transition 2 μs
tVPLEL tVR VPPLowto Chip EnableLow 2 μs
tELQV tDV Chip EnableLowto Output Valid 1 μs
tEHQZ(2) tDFP Chip Enable Highto Output Hi-Z 0 130 ns
tEHAX tAH Chip Enable Highto Address Transition 0 ns

Partno	Mfg	Dc	Qty	Available	Descript
27C801	ST	N/a	3000	avai	8 Mbit 1Mb x 8 UV EPROM and OTP EPROM