27C800 Fast Delivery |IC PHOENIX CO.,LIMITED

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27C800
8 Mbit 1Mb x8 or 512Kb x16 UV EPROM and OTP EPROM
1/17January 2000
M27C800 Mbit (1Mb x8or 512Kb x16) UV EPROM and OTP EPROM 5V± 10% SUPPLY VOLTAGEin READ
OPERATION ACCESS TIME: 50ns BYTE-WIDEor WORD-WIDE
CONFIGURABLE8 Mbit MASK ROM REPLACEMENT LOW POWER CONSUMPTION Active Current 70mAat 8MHz Stand-by Current 50μA PROGRAMMING VOLTAGE: 12.5V± 0.25V PROGRAMMING TIME: 50μs/word ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: B2h
DESCRIPTION
The M27C800isan8 Mbit EPROM offeredinthe
two rangesUV (ultra violet erase) and OTP (one
time programmable).Itis ideally suitedfor micro-
processor systemsrequiring large dataor program
storage.Itis organisedas either1 Mwordsof8bit 512 Kwordsof16bit. The pin-outis compatible
withthe most common8 Mbit Mask ROM.
The FDIP42W (window ceramic frit-seal package)
hasa transparentlid which allowsthe usertoex-
posethe chipto ultraviolet lightto erasethebit pat-
tern. new patterncan thenbe written rapidlytothede-
viceby followingthe programming procedure.
For applications wherethe contentis programmed
only one time and erasureis not required, the
M27C800is offeredin PDIP42, PLCC44 and
SO44 packages.
FDIP42W(F) PDIP42(B)
SO44(M)PLCC44(K)
Figure1. Logic Diagram
AI01593
A0-A18
BYTEVPP
Q0-Q14
VCC
M27C800
VSS
Q15A–1
M27C800
2/17
Figure2B. LCC Connections
AI02042
A11
A14Q2 NC
Q12SS
A10
A16
BYTEVPP
A13
M27C800
A12
Q13SS
Q14
Q10 A15
Q15A–1G
Q11Q4
A18A17 A8NC
Figure2A. DIP Connections
VSS
A13
VSS
A14
A15
A12
A16
BYTEVPP
Q15A–1Q2
VCCQ11
Q14A17
A18 NC
AI01594
M27C800
Q13
A11
A10
Q10
Q12
Figure2C.SO Connections
VSS
A13
VSS
A14
A15
A12
A16
BYTEVPP
Q15A–1Q2
VCCQ11
Q14A18 NC
AI01595
M27C80022Q1
Q13
A11
A10
Q10
Q12
A17 A8
Table1. Signal Names
A0-A18 Address Inputs
Q0-Q7 Data Outputs
Q8-Q14 Data Outputs
Q15A–1 Data Output/ Address Input Chip Enable Output Enable
BYTEVPP Byte Mode/ Program Supply
VCC Supply Voltage
VSS Ground Not Connected Internally
3/17
M27C800
Table2. Absolute Maximum Ratings(1)
Note:1. Exceptforthe rating ”Operating Temperature Range”, stressesabove those listedinthe Table ”Absolute Maximum Ratings”may
cause permanent damagetothe device. Theseare stress ratingsonlyand operationofthe device attheseor anyother conditions
above those indicatedinthe Operating sectionsofthis specificationisnot implied. Exposure toAbsolute Maximum Rating condi-
tionsfor extended periodsmay affect device reliability. Referalsotothe STMicroelectronics SUREProgram andotherrelevantqual-
ity documents. MinimumDC voltageon Inputor Outputis –0.5Vwith possible undershootto –2.0Vfora periodlessthan 20ns. MaximumDC
voltageon OutputisVCC +0.5Vwith possible overshoottoVCC+2Vfora periodless than20ns. Dependson range.
Table3. Operating Modes
Note:X=VIHor VIL,VID=12V± 0.5V.
Table4. Electronic Signature
Symbol Parameter Value Unit Ambient Operating Temperature(3) –40to125 °C
TBIAS Temperature Under Bias –50to125 °C
TSTG Storage Temperature –65to150 °C
VIO(2) Inputor Output Voltage (exceptA9) –2to7 V
VCC Supply Voltage –2to7 V
VA9(2) A9 Voltage –2to 13.5 V
VPP Program Supply Voltage –2to14 V
Mode E G BYTEVPP A9 Q15A–1 Q14-Q8 Q7-Q0
Read Word-wide VIL VIL VIH X DataOut DataOut DataOut
Read Byte-wide Upper VIL VIL VIL XVIH Hi-Z DataOut
Read Byte-wide Lower VIL VIL VIL X VIL Hi-Z DataOut
Output Disable VIL VIH X X Hi-Z Hi-Z Hi-Z
Program VIL Pulse VIH VPP X DataIn DataIn DataIn
Verify VIH VIL VPP X DataOut DataOut DataOut
Program Inhibit VIH VIH VPP X Hi-Z Hi-Z Hi-Z
Standby VIH X X X Hi-Z Hi-Z Hi-Z
Electronic Signature VIL VIL VIH VID Code Codes Codes
Identifier A0
Q15
and
Q14
and
Q13
and
Q12
and
Q11
and
Q10
and
and
and
Hex Data
Manufacturer’sCode VIL 001 000 00 20h
Device Code VIH 101 100 10 B2h
M27C800
4/17
DEVICE OPERATION
The operating modesofthe M27C800are listedin
the Operating Modes Table.A single power supply requiredin the read mode.All inputsare TTL
compatible exceptfor VPP and 12VonA9forthe
Electronic Signature.
Read Mode
The M27C800 has two organisations, Word-wide
and Byte-wide.The organisationis selectedbythe
signal levelonthe BYTEVPP pin. When BYTEVPPat VIHthe Word-wide organisationis selected
andthe Q15A–1pinis usedfor Q15 Data Output.
Whenthe BYTEVPPpinisatVILthe Byte-wideor-
ganisationis selected andthe Q15A–1pinis used
forthe Address Input A–1. Whenthe memoryis
logically regardedas16bit wide,but readinthe
Byte-wide organisation, then with A–1atVIL the
lower8bitsofthe 16bit dataare selected and with
A–1atVIHthe upper8 bitsofthe16bit dataare
selected.
The M27C800 has two control functions, bothof
which mustbe logically activein orderto obtain
dataatthe outputs.In additionthe Word-wideor
Byte- wide organisation mustbe selected.
Chip Enable(E)isthe power control and shouldbe
usedfor device selection. Output Enable(G)isthe
output control and shouldbe usedto gate datato
the output pins independentof device selection.
Assuming thatthe addressesare stable,thead-
dress access time (tAVQV)is equaltothe delay
fromEto output (tELQV). Datais availableatthe
output aftera delayof tGLQV fromthe falling edgeG, assuming thatE has been low andthead-
dresses have been stableforat least tAVQV-tGLQV.
Table5.AC Measurement Conditions
High Speed Standard
Input RiseandFall Times ≤ 10ns ≤ 20ns
Input Pulse Voltages 0to3V 0.4Vto 2.4V
Inputand Output Timing Ref. Voltages 1.5V 0.8Vand2V
Figure3.AC Testing Input Output Waveform
AI01822
High Speed
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure4.AC Testing Load Circuit
AI01823B
1.3V
OUTL= 30pFfor HighSpeedL= 100pFfor StandardL includesJIG capacitance
3.3kΩ
1N914
DEVICE
UNDER
TEST
5/17
M27C800
Table7. Read ModeDC Characteristics(1)
(TA=0to70°Cor –40to85°C; VCC =5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. MaximumDC voltageon OutputisVCC+ 0.5V.
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0V≤VIN≤ VCC ±1 μA
ILO Output Leakage Current 0V≤ VOUT≤VCC ±10 μA
ICC Supply Current VIL,G=VIL,
IOUT= 0mA,f= 8MHz 70 mA VIL,G=VIL,
IOUT= 0mA,f= 5MHz 50 mA
ICC1 Supply Current (Standby)TTL E=VIH 1mA
ICC2 Supply Current (Standby) CMOS E>VCC– 0.2V 50 μA
IPP Program Current VPP =VCC 10 μA
VIL InputLow Voltage –0.3 0.8 V
VIH(2) Input High Voltage 2 VCC+1 V
VOL OutputLow Voltage IOL= 2.1mA 0.4 V
VOH Output High VoltageTTL IOH= –400μA 2.4 V
Table6. Capacitance(1)(TA =25°C,f=1 MHz)
Note:1. Sampledonly,not 100% tested.
Symbol Parameter Test Condition Min Max Unit
CIN
Input Capacitance (except BYTEVPP)VIN =0V 10 pF
Input Capacitance (BYTEVPP)VIN=0V 120 pF
COUT Output Capacitance VOUT =0V 12 pF
Standby Mode
The M27C800hasa standby mode which reduces
the supply current from 50mAto 100μA. The
M27C800is placedinthe standby modeby apply-
inga CMOS high signaltothe Einput. Wheninthe
standby mode,the outputs areina high imped-
ance state, independentoftheG input.
M27C800
6/17
Table8A. Read ModeAC Characteristics(1)
(TA=0to70°Cor –40to85°C; VCC =5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested. Speed obtainedwithHigh SpeedAC measurement conditions.
Table8B. Read ModeAC Characteristics(1)
(TA=0to70°Cor –40to85°C; VCC =5V±5%or5V± 10%; VPP =VCC)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
Symbol Alt Parameter Test Condition
M27C800
Unit-50(3) -70 -90
Min Max Min Max Min Max
tAVQV tACC Address Validto Output
Valid E= VIL,G=VIL 50 70 90 ns
tBHQV tST BYTE Highto Output
Valid E= VIL,G=VIL 50 70 90 ns
tELQV tCE Chip EnableLowto
Output Valid G=VIL 50 70 90 ns
tGLQV tOE Output EnableLowto
Output Valid E=VIL 30 35 45 ns
tBLQZ(2) tSTD BYTE Lowto Output Hi-Z E= VIL,G=VIL 30 30 30 ns
tEHQZ(2) tDF Chip Enable Highto
OutputHi-Z G=VIL 030 0 30 030 ns
tGHQZ(2) tDF Output Enable Highto
OutputHi-Z E=VIL 030 0 30 030 ns
tAXQX tOH Address Transitionto
Output Transition E= VIL,G=VIL 555 ns
tBLQX tOH BYTE Lowto Output
Transition E= VIL,G=VIL 555 ns
Symbol Alt Parameter Test Condition
M27C800
Unit-100 -120/150
Min Max Min Max
tAVQV tACC Address Validto Output Valid E= VIL,G=VIL 100 120 ns
tBHQV tST BYTE Highto Output Valid E= VIL,G=VIL 100 120 ns
tELQV tCE Chip Enable Lowto Output Valid G=VIL 100 120 ns
tGLQV tOE Output EnableLowto Output Valid E=VIL 50 60 ns
tBLQZ(2) tSTD BYTELowto Output Hi-Z E= VIL,G=VIL 40 50 ns
tEHQZ(2) tDF Chip Enable Highto Output Hi-Z G=VIL 0 40 0 50 ns
tGHQZ(2) tDF Output Enable Highto Output Hi-Z E=VIL 0 40 0 50 ns
tAXQX tOH Address Transitionto Output Transition E= VIL,G=VIL 55ns
tBLQX tOH BYTELowto Output Transition E= VIL,G=VIL 55ns
7/17
M27C800
Figure5. Word-Wide Read ModeAC Waveforms
Note: BYTEVPP =VIH.
AI01596B
tAXQX
tEHQZ
A0-A18
Q0-Q15
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Two Line Output Control
Because EPROMs are usually usedin larger
memory arrays,this product featuresa 2-line con-
trol function which accommodatesthe useof mul-
tiple memory connection. The two-line control
function allows:the lowest possible memory power dissipation complete assurance that output bus contention
willnot occur.
For the most efficient useof these two control
lines,E shouldbe decoded and usedasthe prima- device selecting function, whileG shouldbe
madea common connectiontoall devicesinthe
array and connectedto the READ line fromthe
system control bus. This ensures thatall deselect- memory devicesarein theirlow power standby
mode and that the output pins are only active
when datais required froma particular memory
device.
System Considerations
The power switching characteristicsof Advanced
CMOS EPROMs require careful decouplingofthe
suppliesto the devices. The supply current ICC
has three segmentsof importancetothe system
designer:the standby current,the active current
andthe transient peaks thatare producedbythe
falling and rising edgesofE.
The magnitudeof the transient current peaksis
dependentonthe capacitive and inductive loading the device outputs. The associated transient
voltage peaks canbe suppressedby complying
withthetwoline output control andby properlyse-
lected decoupling capacitors.Itis recommended
thata 0.1μF ceramic capacitoris usedon every
device between VCC and VSS.
This shouldbea high frequency typeoflow inher-
ent inductance and shouldbe placedas closeas
possibletothe device.In addition,a 4.7μF electro-
lytic capacitor shouldbe used between VCC and
VSSfor every eight devices. This capacitor should mounted near the power supply connection
point. The purposeofthis capacitoristo overcome
the voltage drop causedbythe inductive effectsof
PCB traces.
M27C800
8/17
Figure6. Byte-Wide Read ModeAC Waveforms
Note: BYTEVPP =VIL.
Figure7. BYTE TransitionAC Waveforms
Note: Chip Enable(E)and Output Enable(G)=VIL.
AI01597B
tAXQX
tEHQZ
A–1,A0-A18
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
AI01598C
tAXQX
tBHQV
A0-A18
BYTEVPP
tAVQV
tBLQX
tBLQZ
VALID
Hi-Z
A–1
DATAOUT
DATAOUT
VALID
Q0-Q7
Q8-Q15
9/17
M27C800
Table9. Programming ModeDC Characteristics(1)
(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.5V± 0.25V)
Note:1.VCC mustbe applied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP.
Table10. Programming ModeAC Characteristics(1)
(TA =25°C; VCC= 6.25V± 0.25V; VPP= 12.5V± 0.25V)
Note:1.VCCmust beapplied simultaneouslywithor beforeVPPand removed simultaneouslyorafterVPP. Sampledonly,not 100% tested.
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0≤VIN≤VCC ±1 μA
ICC Supply Current 50 mA
IPP Program Current E=VIL 50 mA
VIL InputLow Voltage –0.3 0.8 V
VIH Input High Voltage 2.4 VCC+0.5 V
VOL Output Low Voltage IOL= 2.1mA 0.4 V
VOH Output High VoltageTTL IOH= –2.5mA 3.5 V
VID A9 Voltage 11.5 12.5 V
Symbol Alt Parameter Test Condition Min Max Unit
tAVEL tAS Address Validto Chip Enable Low 2 μs
tQVEL tDS Input Validto Chip EnableLow 2 μs
tVPHAV tVPS VPP Highto Address Valid 2 μs
tVCHAV tVCS VCC Highto Address Valid 2 μs
tELEH tPW Chip Enable Program Pulse Width 45 55 μs
tEHQX tDH Chip Enable Highto Input Transition 2 μs
tQXGL tOES Input Transitionto Output EnableLow 2 μs
tGLQV tOE Output Enable Lowto Output Valid 120 ns
tGHQZ(2) tDFP Output Enable Highto Output Hi-Z 0 130 ns
tGHAX tAH Output Enable Highto Address
Transition 0ns
Programming
When delivered (and after each erasureforUV
EPROM),all bitsofthe M27C800 arein the’1’
state. Datais introducedby selectively program-
ming ’0’s intothe desiredbit locations. Although
only’0’swillbe programmed, both’1’s and’0’scan presentin the data word. The only wayto
changea’0’toa’1’isbydie expositionto ultravio-
let light (UVEPROM). The M27C800isinthe pro-
gramming mode when VPP inputisat 12.5V,GisVIH andEis pulsedto VIL. The datatobe pro-
grammedis appliedto16bitsin paralleltothe data
output pins. The levels requiredfor the address
and data inputsare TTL. VCCis specifiedtobe
6.25V± 0.25V.

Partno	Mfg	Dc	Qty	Available	Descript
27C800	ST	N/a	3000	avai	8 Mbit 1Mb x8 or 512Kb x16 UV EPROM and OTP EPROM