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27C512-M27C512-12C1TR
512 Kbit 64Kb x8 UV EPROM and OTP EPROM
M27C512512 Kbit (64Kb x8) UV EPROM and OTP EPROM
November 1998 1/15
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
FAST ACCESS TIME: 45ns
LOW POWER “CMOS” CONSUMPTION: Active Current 30mA Standby Current 100μA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIMES of AROUND 6sec.
(PRESTO IIB ALGORITHM)
ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 3Dh
DESCRIPTIONThe M27C512 is a 512 Kbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for applica-
tions where fast turn-around and pattern experi-
mentation are important requirements and is
organized as 65,536 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to expose
the chip to ultraviolet light to erase the bit pattern.
A new pattern can then be written to the device by
following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
Figure 1. Logic Diagram
Table 1. Signal Names
Figure 2A. DIP Pin Connections
Warning: NC = Not Connected, DU = Don’t Use
Figure 2B. LCC Pin Connections
Figure 2C. TSOP Pin Connections DEVICE OPERATION The modes of operations of the M27C512 are listed
in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GVPP and 12V on A9 for
Electronic Signature.
Read Mode The M27C512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(tAVQV) is equal to the delay from E to output (tELQV).
Data is available at the output after a delay of tGLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least tAVQV-tGLQV.
Standby Mode The M27C512 has a standby mode which reduces
the active current from 30mA to 100μA The
M27C512 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high impedance
state, independent of the GVPP input.
2/15
M27C512
Notes:1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Depends on range.
Table 2. Absolute Maximum Ratings (1)
Note: X = VIH or VIL, VID = 12V ± 0.5V
Table 3. Operating Modes
Table 4. Electronic Signature
Two Line Output Control Because EPROMs are usually used in larger mem-
ory arrays, the product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus. This ensures that all deselected mem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
3/15
M27C512
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
Table 5. AC Measurement Conditions
Note.1. Sampled only, not 100% tested.
Table 6. Capacitance (1) (TA = 25 °C, f = 1 MHz )
System Considerations The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at the
output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1μF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7μF bulk electrolytic capacitor should be used
between VCC and VSS for every eight devices. The
bulk capacitor should be located near the power
supplyconnection point.The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
4/15
M27C512
Notes:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Maximum DC voltage on Output is VCC +0.5V.
Table 7. Read Mode DC Characteristics (1)(TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Notes. 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested. In case of 45ns speed see High Speed AC measurement conditions.
Table 8A. Read Mode AC Characteristics (1)(TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
5/15
M27C512
Notes. 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Table 8B. Read Mode AC Characteristics (1)(TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Figure 5. Read Mode AC Waveforms
ProgrammingWhen delivered (and after each erasure for UV
EPROM), all bits of the M27C512 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed, both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’ is by die exposure to ultraviolet
light (UV EPROM). The M27C512 is in the pro-
gramming mode when VPP input is at 12.75V and
E is pulsed to VIL. The data to be programmed is
applied to 8 bits in parallel to the data output pins.
The levels required for the address and data inputs
are TTL. VCC is specified to be 6.25V ± 0.25V.
The M27C512 can use PRESTO IIB Programming
Algorithm that drastically reduces the programming
time (typically less than 6 seconds). Nevertheless
to achieve compatibility with all programming
equipments, PRESTO Programming Algorithm can
be used as well.
6/15
M27C512
Notes:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
Table 11. Programming Mode AC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 9. Programming Mode DC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 10. MARGIN MODE AC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
7/15
M27C512
Figure 6. MARGIN MODE AC Waveforms
Figure 7. Programming and Verify Modes AC Waveforms
Note: A8 High level = 5V; A9 High level = 12V.8/15
M27C512
