M27512-2F1 ,NMOS 512K 64K x 8 UV EPROMLogic DiagramDESCRIPTIONThe M27512 is a 524,288 bit UV erasable andelectrically programmable memory ..
M27512-3F1 ,NMOS 512 Kbit (64Kb x 8) UV EPROM, 300nsAbsolute Maximum RatingsSymbol Parameter Value UnitGrade 1 0 to 70T Ambient Operating Temperature ° ..
M2764A ,NNDM2764ANMOS 64 Kbit (8Kb x 8) UV EPROMNOT FOR NEW DESIGN
27512-M27512-20F1-M27512-2F1-M27512-3F1
NMOS 512K 64K x 8 UV EPROM
Figure 1. Logic DiagramNMOS 512K (64K x 8) UV EPROM
FAST ACCESS TIME: 200ns
EXTENDED TEMPERATURE RANGE
SINGLE 5V SUPPLY VOLTAGE
LOW STANDBY CURRENT: 40mA max
TTL COMPA TIBLE DURING READ and
PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
DESCRIPTIONThe M27512 is a 524,288 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 65,536 words by 8 bits.
The M27512 is housed in a 28 Pin Window Ceramic
Frit-Seal Dual-in-Line package. The transparent lid
allows the user to expose the chip to ultraviolet light
to erase the bit pattern. A new pattern can then be
written to the device by following the programming
procedure.
Table 1. Signal NamesMarch 1995 1/11
Figure 2. DIP Pin Connections
Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may causepermanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality document
Table 2. Absolute Maximum Ratings
DEVICE OPERATIONThe six modes of operations of the M27512 are
listed in the Operating Modes table. A single 5V
power supply is required in the read mode. All
inputs are TTL levels except for GVPP and 12V on
A9 for Electronic Signature.
Read ModeThe M27512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, address access time (tAVQV)
is equal to the delay from E to output (tELQV). Data
is available at the outputs after delay of tGLQV from
the falling edge of G, assuming that E has been low
and the addresses have been stable for at least
tAVQV-tGLQV.
Standby ModeThe M27512 has a standby mode which reduces
the maximum active power current from 125mA to
40mA. The M27512 is placed in the standby mode
by applying a TTL high signal to the E input. When
in the standby mode, the outputs are in a high
impedance state, independent of the GVPP input.
Two Line Output ControlBecause EPROMs are usually used in larger mem-
ory arrays, the product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows :
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
M27512
For the most efficient use of these two control lines, should be decoded and used as the primary
device selecting function, while GVPP should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all dese-
lected memory devices are in their low power
standby mode and that the output pins are only
active when data is required from a particular mem-
ory device.
System ConsiderationsThe power switching characteristics of fast
EPROMs require careful decoupling of the devices.
The supply current, ICC, has three segments that
are of interest to the system designer : the standby
current level, the active current level, and transient
current peaks that are produced by the falling and
rising edges of E. The magnitude of the transient
current peaks is dependent on the capacitive and
inductive loading of the device at the output. The
associated transient voltage peaks can be sup-
pressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommenced that a 1μF ceramic
capacitor be used on every device between VCC
and VSS. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7μF bulk electrolytic capacitor should be used
between VCC and VSS for every eight devices. The
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
ProgrammingWhen delivered, and after each erasure, all bits of
the M27512 are in the “1" state. Data is introduced
by selectively programming ”0s" into the desired bit
locations. Although only “0s” will be programmed,
both “1s” and “0s” can be present in the data word.
The only way to change a “0" to a ”1" is by ultraviolet
light erasure. The M27512 is in the programming
mode when GVPP input is at 12.5V and E is at
TTL-low. The data to be programmed is applied 8
bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL.
The M27512 can use PRESTO Programming Algo-
rithm that drastically reduces the programming
time (typically less than 50 seconds). Nevertheless
to achieve compatibility with all programming
equipment, the standard Fast Programming Algo-
rithm may also be used.
Fast Programming AlgorithmFast Programming Algorithm rapidly programs
M27512 EPROMs using an efficient and reliable
method suited to the production programming en-
vironment. Programming reliability is also ensured
as the incremental program margin of each byte is
continually monitored to determine when it has
been successfully programmed. A flowchart of the
M27512 Fast Programming Algorithm is shown in
Figure 8.
Note: X = VIH or VIL, VID = 12V ± 0.5%.
Table 3. Operating Modes
Table 4. Electronic Signature
DEVICE OPERATION (cont’d)
M27512
Figure 3. AC Testing Input Output WaveformsInput Rise and Fall Times ≤ 20ns
Input Pulse Voltages 0.45V to 2.4V
Input and Output Timing Ref. Voltages 0.8V to 2.0V
AC MEASUREMENT CONDITIONS
Figure 4. AC Testing Load CircuitNote that Output Hi-Z is defined as the point where data
is no longer driven.
Note:1. Sampled only, not 100% tested.
Table 5. Capacitance (1) (TA = 25 °C, f = 1 MHz )
Figure 5. Read Mode AC Waveforms
M27512
Notes:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested.
Table 7. Read Mode AC Characteristics (1)(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 6. Read Mode DC Characteristics (1)(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 8. Programming Mode DC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
M27512
Notes. 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. The Initial Program Pulse width tolerance is 1 ms ± 5%.
3. The length of the Over-program Pulse varies from 2.85 ms to 78.95 ms, depending on the multiplication value of the iteration counter.
4. Sampled only, not 100% tested.
Table 10. Programming Mode AC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
Table 9. MARGIN MODE AC Characteristics (1)(TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)
M27512
