OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT The TC74VHCT373AF is a high-speed CMOS octal D-type latch manufactured by Toshiba. Below are the factual details about its specifications, descriptions, and features:
### **Manufacturer:**
Toshiba
### **Specifications:**
- **Logic Type:** Octal D-Type Transparent Latch
- **Number of Bits:** 8
- **Supply Voltage Range (VCC):** 4.5V to 5.5V
- **High-Level Input Voltage (VIH):** 2.0V (min)
- **Low-Level Input Voltage (VIL):** 0.8V (max)
- **High-Level Output Voltage (VOH):** 4.4V (min) at IOH = -4mA
- **Low-Level Output Voltage (VOL):** 0.1V (max) at IOL = 4mA
- **Propagation Delay Time (tpd):** 7.5ns (max) at VCC = 5V, CL = 50pF
- **Operating Temperature Range:** -40°C to +85°C
- **Package Type:** TSSOP-20
### **Descriptions:**
- The TC74VHCT373AF is designed for bus interface applications and features 3-state outputs.
- It is compatible with TTL levels, making it suitable for interfacing with TTL logic.
- The latch is transparent when the Latch Enable (LE) input is high, allowing data to pass through. When LE is low, the data is latched.
- Outputs can be placed in a high-impedance state using the Output Enable (OE) input.
### **Features:**
- **High-Speed Operation:** Optimized for 5V systems with fast propagation delay.
- **Low Power Consumption:** CMOS technology ensures low power dissipation.
- **3-State Outputs:** Allows direct connection to a bus-organized system.
- **TTL-Compatible Inputs:** Can interface directly with TTL logic levels.
- **Wide Operating Voltage Range:** Supports 4.5V to 5.5V operation.
- **Latch-Up Performance:** Improved latch-up immunity compared to standard CMOS.
This information is sourced from the manufacturer's datasheet. For detailed electrical characteristics and timing diagrams, refer to Toshiba's official documentation.
