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SN54LS112J from TI,Texas Instruments

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SN54LS112J

Manufacturer: TI

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP

Partnumber Manufacturer Quantity Availability
SN54LS112J TI 700 In Stock

Description and Introduction

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS112J is a dual negative-edge-triggered J-K flip-flop manufactured by Texas Instruments (TI).  

### **Key Specifications:**  
- **Logic Family:** LS (Low-Power Schottky)  
- **Technology:** TTL (Transistor-Transistor Logic)  
- **Number of Circuits:** 2 (Dual Flip-Flop)  
- **Trigger Type:** Negative-Edge Triggered  
- **Supply Voltage Range (VCC):** 4.5V to 5.5V  
- **Operating Temperature Range:** -55°C to +125°C (Military Grade)  
- **Package Type:** Ceramic DIP (Dual In-line Package)  
- **Pin Count:** 16  

### **Features:**  
- **Independent J-K Inputs:** Each flip-flop has separate J, K, clock (CLK), preset (PRE), and clear (CLR) inputs.  
- **Asynchronous Clear and Preset:** Allows immediate setting or resetting of outputs regardless of clock state.  
- **High-Speed Operation:** Optimized for fast switching applications.  
- **Low Power Consumption:** Typical power dissipation of 20mW per flip-flop.  
- **Wide Operating Temperature Range:** Suitable for harsh environments.  

### **Applications:**  
- Data synchronization  
- Frequency division  
- State machine design  
- Control logic circuits  

This device is part of TI's 54-series, which is designed for military and high-reliability applications.

Partnumber Manufacturer Quantity Availability
SN54LS112J MOT 120 In Stock

Description and Introduction

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS112J is a dual negative-edge-triggered J-K flip-flop with preset and clear, manufactured by **MOT (Motorola)**.  

### **Specifications:**  
- **Logic Family:** LS (Low-Power Schottky)  
- **Number of Circuits:** 2 (Dual Flip-Flop)  
- **Trigger Type:** Negative-Edge Triggered  
- **Supply Voltage Range:** 4.75V to 5.25V  
- **Operating Temperature Range:** -55°C to +125°C (Military Grade)  
- **Package Type:** Ceramic DIP (Dual In-line Package)  
- **Propagation Delay:** Typically 20ns  
- **Power Dissipation:** Low power consumption  

### **Descriptions and Features:**  
- Each flip-flop has independent **J, K, Clock (CLK), Preset (PRE), and Clear (CLR)** inputs.  
- **Asynchronous preset and clear** allow immediate state control.  
- **Negative-edge triggering** ensures stable operation on clock signal transitions.  
- **High noise immunity** due to Schottky-clamped inputs.  
- **Wide operating temperature range** for harsh environments.  
- **Military-grade reliability** (SN54 series).  

This device is commonly used in **counters, registers, and control logic applications** requiring precise timing and state retention.

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