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STM32F103R8T6 from STM,ST Microelectronics

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15.625ms

STM32F103R8T6

Manufacturer: STM

Mainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN

Partnumber Manufacturer Quantity Availability
STM32F103R8T6 STM 8900 In Stock

Description and Introduction

Mainstream Performance line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN The **STM32F103R8T6** is a microcontroller from STMicroelectronics, part of the STM32F1 series based on the ARM Cortex-M3 core. Below are its key specifications, descriptions, and features:

### **Manufacturer**: STMicroelectronics  
### **Series**: STM32F1  
### **Core**: ARM Cortex-M3 (32-bit)  
### **Operating Frequency**: Up to 72 MHz  
### **Flash Memory**: 64 KB  
### **SRAM**: 20 KB  
### **Package**: LQFP-64  

### **Key Features**:
- **CPU Performance**:  
  - 72 MHz max frequency with 1.25 DMIPS/MHz performance.  
  - Single-cycle multiplication and hardware division.  

- **Memory**:  
  - 64 KB Flash memory for program storage.  
  - 20 KB SRAM for data storage.  

- **Peripherals**:  
  - **GPIOs**: 51 general-purpose I/O pins.  
  - **Timers**: 3 general-purpose timers, 1 advanced-control timer, 2 watchdog timers.  
  - **Communication Interfaces**:  
    - 3 × USART, 2 × SPI, 2 × I2C.  
    - 1 × USB 2.0 full-speed interface.  
    - 1 × CAN 2.0B controller.  
  - **ADC**: 2 × 12-bit ADCs (16 channels, 1 μs conversion time).  
  - **DAC**: 2 × 12-bit DACs.  

- **Operating Conditions**:  
  - **Voltage Supply**: 2.0 V to 3.6 V.  
  - **Temperature Range**: -40°C to +85°C.  

- **Debugging**:  
  - Serial Wire Debug (SWD) and JTAG interfaces.  

- **Additional Features**:  
  - Power-saving modes (Sleep, Stop, Standby).  
  - CRC calculation unit.  
  - 96-bit unique device ID.  

### **Applications**:  
- Industrial control systems, consumer electronics, motor control, medical devices, and embedded applications.  

This microcontroller is widely used for its balance of performance, power efficiency, and rich peripheral set.

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