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M74HC73RM13TR from ST,ST Microelectronics

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M74HC73RM13TR

Manufacturer: ST

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

Partnumber Manufacturer Quantity Availability
M74HC73RM13TR ST 390 In Stock

Description and Introduction

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR The M74HC73RM13TR is a dual JK flip-flop with reset, manufactured by STMicroelectronics.  

### **Specifications:**  
- **Logic Family:** HC  
- **Logic Type:** JK Flip-flop  
- **Number of Circuits:** 2  
- **Number of Bits per Element:** 1  
- **Trigger Type:** Negative Edge  
- **Supply Voltage (VCC):** 2V to 6V  
- **High-Level Output Current:** -5.2mA  
- **Low-Level Output Current:** 5.2mA  
- **Propagation Delay Time:** 17ns at 5V  
- **Operating Temperature Range:** -55°C to +125°C  
- **Package / Case:** SO-14  
- **Mounting Type:** Surface Mount  

### **Descriptions:**  
The M74HC73RM13TR is a high-speed CMOS dual JK flip-flop with individual J, K, clock (CP), and reset (R) inputs. It features negative-edge triggering and asynchronous reset functionality.  

### **Features:**  
- **High-Speed Operation:** Optimized for performance with HC technology.  
- **Low Power Consumption:** CMOS design ensures minimal power usage.  
- **Wide Operating Voltage Range:** 2V to 6V.  
- **Balanced Propagation Delays:** Ensures reliable timing performance.  
- **Asynchronous Reset:** Allows immediate clearing of outputs.  
- **ESD Protection:** Improved robustness against electrostatic discharge.  

This information is based solely on the manufacturer's datasheet.

Application Scenarios & Design Considerations

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
Partnumber Manufacturer Quantity Availability
M74HC73RM13TR STM 19 In Stock

Description and Introduction

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR The M74HC73RM13TR is a dual JK flip-flop with reset, manufactured by STMicroelectronics (STM).  

### **Specifications:**  
- **Logic Family:** HC (High-Speed CMOS)  
- **Supply Voltage Range:** 2V to 6V  
- **Operating Temperature Range:** -55°C to +125°C  
- **High Noise Immunity:** CMOS technology  
- **Low Power Consumption:** Suitable for battery-operated devices  
- **Output Drive Capability:** 10 LSTTL loads  
- **Propagation Delay:** Typically 17 ns at 5V  
- **Package:** SO-14 (Small Outline)  
- **Mounting Type:** Surface Mount  

### **Descriptions:**  
- Dual JK flip-flop with individual J, K, clock (CP), and reset (R) inputs  
- Complementary outputs (Q and Q̅) for each flip-flop  
- Asynchronous reset function  

### **Features:**  
- **Dual Flip-Flop:** Two independent JK flip-flops in one package  
- **Reset Function:** Direct reset (active LOW) for each flip-flop  
- **Wide Operating Voltage:** Compatible with TTL levels  
- **High-Speed Operation:** Suitable for high-frequency applications  
- **Balanced Propagation Delays:** Ensures reliable timing performance  

This information is based on the manufacturer's datasheet. For detailed electrical characteristics and application notes, refer to the official STMicroelectronics documentation.

Application Scenarios & Design Considerations

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

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