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IDT71V35761S200PF from IDT

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31.250ms

IDT71V35761S200PF

Manufacturer: IDT

128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect

Partnumber Manufacturer Quantity Availability
IDT71V35761S200PF IDT 190 In Stock

Description and Introduction

128K x 36, 256K x 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect The IDT71V35761S200PF is a high-speed synchronous SRAM manufactured by Integrated Device Technology (IDT). Here are its key specifications, descriptions, and features:

### **Specifications**  
- **Density:** 4Mbit (256K x 18)  
- **Organization:** 262,144 words × 18 bits  
- **Supply Voltage:** 3.3V (±10%)  
- **Access Time:** 2.0 ns (max)  
- **Cycle Time:** 2.5 ns (max)  
- **Operating Temperature Range:** Commercial (0°C to +70°C) or Industrial (-40°C to +85°C)  
- **Package:** 100-pin TQFP (14mm × 20mm)  
- **I/O Type:** LVTTL-compatible  

### **Descriptions**  
- The IDT71V35761S200PF is a **3.3V synchronous pipelined SRAM** designed for high-performance applications.  
- It supports **burst mode operations** with a **linear or interleaved burst sequence**.  
- Features a **dual-cycle deselect (DCD) function** for power savings.  
- Includes **ZZ (sleep mode) pin** for ultra-low standby power consumption.  

### **Features**  
- **Pipelined Operation:** Enables high-speed data transfers with registered inputs and outputs.  
- **Burst Control:** Supports burst lengths of 2, 4, or 8 with linear/interleaved addressing.  
- **Self-Timed Write Cycle:** Simplifies write timing control.  
- **Single Clock (CLK) Operation:** All operations synchronized to the rising edge of CLK.  
- **JTAG Boundary Scan (IEEE 1149.1 Compliant):** Supports board-level testing.  
- **Low Standby Power (ZZ Mode):** Reduces power consumption when inactive.  

This SRAM is commonly used in networking, telecommunications, and high-performance computing applications.

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