85MHz Dual 12-Bit Double Pumped Input LDI Transmitter VGA/UXGA# DS90C387RVJD Technical Documentation
*Manufacturer: National Semiconductor (NS)*
## 1. Application Scenarios
### Typical Use Cases
The DS90C387RVJD is a high-performance LVDS (Low-Voltage Differential Signaling) serializer designed for high-speed digital video transmission applications. Typical use cases include:
- Digital Display Interfaces : Primary application in LCD/OLED display systems for serializing 24-bit RGB data with control signals
- Medical Imaging Displays : Used in high-resolution medical monitors requiring reliable data transmission
- Automotive Infotainment Systems : Implements robust video links between head units and display panels
- Industrial Control Panels : Provides noise-resistant video transmission in electrically noisy environments
- Aviation Cockpit Displays : Meets stringent reliability requirements for critical display systems
### Industry Applications
Consumer Electronics
- High-definition televisions and monitors
- Digital signage and advertising displays
- Gaming consoles and VR headset displays
Professional/Industrial
- Broadcast studio monitors
- Industrial HMI (Human-Machine Interface) systems
- Military and aerospace display subsystems
Automotive
- Center stack displays
- Digital instrument clusters
- Rear-seat entertainment systems
### Practical Advantages
Strengths:
- Noise Immunity : LVDS differential signaling provides excellent EMI performance
- Power Efficiency : Low 3.3V operation with typical 95mW power consumption
- High Bandwidth : Supports pixel clocks up to 85MHz, enabling UXGA (1600×1200) resolution
- Cable Reduction : Serializes 28 signals (24 data + 4 control) into 4 differential pairs
- Integrated Features : Includes DC-balanced encoding and built-in termination
Limitations:
- Distance Constraints : Maximum reliable transmission distance of ~10 meters
- Clock Recovery Dependency : Requires precise clock recovery at receiver
- Component Matching : Must be paired with compatible deserializer (DS90C388)
- Power Sequencing : Sensitive to improper power-up sequences
## 2. Design Considerations
### Common Design Pitfalls and Solutions
Power Supply Issues
- *Pitfall*: Inadequate decoupling causing signal integrity problems
- *Solution*: Implement 0.1μF ceramic capacitors within 5mm of all power pins, plus 10μF bulk capacitance
Signal Integrity Problems
- *Pitfall*: Improper termination leading to signal reflections
- *Solution*: Use 100Ω differential termination resistors matched to cable impedance
- *Pitfall*: Excessive trace length mismatches in differential pairs
- *Solution*: Maintain <5mm length matching within differential pairs
EMC/EMI Challenges
- *Pitfall*: Poor layout causing radiated emissions
- *Solution*: Implement continuous ground planes and minimize loop areas
### Compatibility Issues
Must Use With:
- DS90C388 LVDS deserializer (companion chip)
- Compatible timing controllers (T-CON) for display applications
Interface Considerations:
- Input Compatibility : TTL/CMOS compatible inputs (3.3V tolerant)
- Output Standard : ANSI/TIA/EIA-644 LVDS compliant
- Clock Requirements : Requires stable 3.3V CMOS/TTL pixel clock
Incompatible Components:
- RS-422/485 transceivers (different protocol)
- Single-ended video drivers
- Components requiring 5V I/O levels
### PCB Layout Recommendations
Power Distribution
- Use separate power planes for analog and digital sections
- Implement star-point grounding for noise-sensitive circuits
- Place decoupling capacitors directly adjacent to power pins
Signal Routing
- Differential Pairs : Route as closely coupled pairs with consistent spacing
- Length Matching
