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CY7C1414AV18-200BZC from CY,Cypress

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15.625ms

CY7C1414AV18-200BZC

Manufacturer: CY

36-Mbit QDR-II? SRAM 2-Word Burst Architecture

Partnumber Manufacturer Quantity Availability
CY7C1414AV18-200BZC,CY7C1414AV18200BZC CY 15 In Stock

Description and Introduction

36-Mbit QDR-II? SRAM 2-Word Burst Architecture The CY7C1414AV18-200BZC is a high-speed synchronous pipelined SRAM manufactured by Cypress Semiconductor (now part of Infineon Technologies). Here are its key specifications:

- **Density**: 18 Mb (1M x 18)
- **Organization**: 1,048,576 words × 18 bits
- **Speed**: 200 MHz (5 ns clock cycle)
- **Voltage Supply**: 1.8V (VDD) core, 1.5V/1.8V (VDDQ) I/O
- **Interface**: Synchronous pipelined with ZQ calibration
- **Access Time**: 5 ns (pipelined)
- **Operating Temperature**: Commercial (0°C to +70°C) or Industrial (-40°C to +85°C)
- **Package**: 165-ball FBGA (13mm × 15mm)
- **Features**: 
  - Byte write capability
  - On-die termination (ODT)
  - Echo clock (CQ/CQ#) for data capture
  - JTAG boundary scan (IEEE 1149.1 compliant)
  - Single-cycle deselect
  - Burst modes: Linear or interleaved
  - 2-cycle read/write latency

This SRAM is designed for high-performance networking and computing applications requiring fast data access.

Partnumber Manufacturer Quantity Availability
CY7C1414AV18-200BZC,CY7C1414AV18200BZC CYPRESS 19 In Stock

Description and Introduction

36-Mbit QDR-II? SRAM 2-Word Burst Architecture The CY7C1414AV18-200BZC is a high-performance synchronous pipelined SRAM manufactured by Cypress Semiconductor. Here are its key specifications:

- **Type**: Synchronous Pipelined SRAM  
- **Density**: 18-Mbit (1M x 18)  
- **Speed**: 200 MHz  
- **Voltage Supply**: 1.8V  
- **Organization**: 1,048,576 words × 18 bits  
- **I/O Type**: Common I/O (CIO)  
- **Package**: 165-ball FBGA (Fine-Pitch Ball Grid Array)  
- **Operating Temperature**: Commercial (0°C to +70°C)  
- **Access Time**: 3.5 ns (maximum)  
- **Cycle Time**: 5 ns (200 MHz operation)  
- **Features**:  
  - Byte Write capability  
  - Burst mode operation (Linear or Interleaved)  
  - ZZ (Sleep Mode) for power savings  
  - JTAG boundary scan support  
  - Single-cycle deselect for easy depth expansion  

This SRAM is designed for high-speed networking, telecommunications, and other performance-critical applications.

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