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CY7C1412AV18-250BZC from CY,Cypress

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CY7C1412AV18-250BZC

Manufacturer: CY

36-Mbit QDR-II? SRAM 2-Word Burst Architecture

Partnumber Manufacturer Quantity Availability
CY7C1412AV18-250BZC,CY7C1412AV18250BZC CY 11 In Stock

Description and Introduction

36-Mbit QDR-II? SRAM 2-Word Burst Architecture The CY7C1412AV18-250BZC is a high-performance synchronous pipelined SRAM manufactured by Cypress Semiconductor (now Infineon Technologies). Here are its key specifications:

- **Density**: 18 Mb (1M x 18)
- **Speed**: 250 MHz (4 ns clock-to-output)
- **Voltage Supply**: 1.8V ±5% (VDD) and 1.5V ±5% (VDDQ)
- **Organization**: 1,048,576 words × 18 bits
- **Interface**: Synchronous (ZBT, NoBL, or flow-through)
- **I/O Type**: HSTL (1.5V)
- **Operating Temperature**: Commercial (0°C to +70°C) or Industrial (-40°C to +85°C)
- **Package**: 165-ball FBGA (13mm × 15mm)
- **Features**: 
  - Pipelined operation for high-speed applications
  - Byte write capability
  - JTAG boundary scan (IEEE 1149.1 compliant)
  - On-chip address and data pipeline registers
  - Single-cycle deselect for easy depth expansion
  - Burst mode support (linear or interleaved)

This SRAM is designed for networking, telecommunications, and high-performance computing applications.

Partnumber Manufacturer Quantity Availability
CY7C1412AV18-250BZC,CY7C1412AV18250BZC CYPRESS 51 In Stock

Description and Introduction

36-Mbit QDR-II? SRAM 2-Word Burst Architecture The CY7C1412AV18-250BZC is a high-performance synchronous pipelined SRAM manufactured by Cypress Semiconductor. Here are its key specifications:

- **Type**: Synchronous Pipelined SRAM
- **Density**: 4 Mbit (256K x 18)
- **Speed**: 250 MHz
- **Operating Voltage**: 1.8V
- **I/O Voltage**: 1.8V
- **Organization**: 256K words x 18 bits
- **Package**: 165-ball BGA (Ball Grid Array)
- **Operating Temperature Range**: Commercial (0°C to +70°C) or Industrial (-40°C to +85°C)
- **Access Time**: 3.6 ns (max)
- **Cycle Time**: 4.0 ns (max)
- **Features**:
  - Burst mode operation (linear or interleaved)
  - Byte write control
  - Single-cycle deselect
  - JTAG boundary scan (IEEE 1149.1 compliant)
  - ZZ (sleep mode) for power saving
  - Echo clocks for simplified data capture

This SRAM is designed for high-speed networking, telecommunications, and other applications requiring fast data access.

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