N-Channel Dual Gate MOS‐Fieldeffect Tetrode, Depletion Mode# BF995 N-Channel Dual-Gate MOSFET Technical Documentation
*Manufacturer: INFINEON*
## 1. Application Scenarios
### Typical Use Cases
The BF995 is an N-channel dual-gate MOSFET specifically designed for VHF/UHF applications where high-frequency performance and signal control are critical. Primary use cases include:
- RF Mixers : Excellent for frequency conversion circuits due to independent gate control
- AGC Amplifiers : Second gate provides convenient gain control without affecting input matching
- Oscillator Circuits : Stable performance in local oscillator designs up to 500 MHz
- RF Switching : Fast switching characteristics suitable for signal routing applications
### Industry Applications
- Broadcast Receivers : FM radio tuners (88-108 MHz) and television tuners
- Communication Systems : Two-way radios, amateur radio equipment
- Test & Measurement : Signal generators, spectrum analyzer front-ends
- Consumer Electronics : Car radio systems, set-top boxes
### Practical Advantages
- High Input Impedance : Minimal loading of preceding stages
- Independent Gain Control : Second gate allows DC gain adjustment
- Low Noise Figure : Typically 2.5 dB at 200 MHz
- Good Cross-Modulation Performance : Superior to bipolar transistors in crowded RF environments
### Limitations
- Limited Power Handling : Maximum drain current of 30 mA restricts high-power applications
- ESD Sensitivity : Requires careful handling during assembly
- Gate Protection : Internal diodes limit gate voltage to approximately ±8V
- Frequency Roll-off : Performance degrades above 500 MHz
## 2. Design Considerations
### Common Design Pitfalls and Solutions
Pitfall 1: Oscillation in RF Stages
- Cause : Poor layout and inadequate decoupling
- Solution : Use RF chokes in drain circuit, implement proper grounding
Pitfall 2: Gain Compression
- Cause : Insufficient gate 2 bias voltage headroom
- Solution : Maintain gate 2 voltage between 3-8V for optimal dynamic range
Pitfall 3: DC Instability
- Cause : Improper biasing of dual gates
- Solution : Use stable voltage references and temperature-compensated bias networks
### Compatibility Issues
Passive Components
- Use high-Q RF capacitors (NP0/C0G) for coupling and bypass
- Avoid ferrite beads above 200 MHz due to parasitic capacitance
- Select resistors with low parasitic inductance (thin-film preferred)
Active Component Integration
- Compatible with most RF ICs when proper impedance matching is maintained
- May require buffer stages when driving high-capacitance loads
- Watch for LO leakage in mixer applications affecting nearby sensitive components
### PCB Layout Recommendations
Critical RF Path
- Keep gate 1 input traces as short as possible (<10mm ideal)
- Use ground planes extensively beneath RF sections
- Implement proper via stitching around sensitive nodes
Power Supply Decoupling
- Place 100pF and 10nF capacitors close to drain and gate 2 pins
- Use separate decoupling for analog and digital supply sections
- Implement star grounding for mixed-signal applications
Thermal Management
- Although low-power device, ensure adequate copper area for drain pin
- Avoid placing near heat-generating components in compact designs
## 3. Technical Specifications
### Key Parameter Explanations
Absolute Maximum Ratings
- Drain-Source Voltage (VDS): 20V
- Gate-Source Voltage (VG1S, VG2S): ±8V
- Drain Current (ID): 30 mA
- Total Device Dissipation: 300 mW
Essential Electrical Characteristics (Typical @ 25°C)
- Forward Transfer Admittance (|Yfs|): 18 mS @ VDS =
