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The ADuC7020 is fully integrated, 1 MSPS, 12-bit data acquisition systems incorporating high performance multichannel ADCs, 16-bit/32-bit MCUs, and Flash/EE memory on a single chip.
The OP2177/OP1177 is the fourth generation of ADI., industry-standard OP07 amplifier family. OP2177 is a high precision, low noise operational amplifier with a combination of extremely low offset voltage and very low input bias currents. Unlike JFET amplifiers, the low bias and offset currents are relatively insensitive to ambient temperatures, even up to 125degree.

  1. Input signal conditioning circuit

HART bus transmission is FSK signal, and the modulation and demodulation chip is receiving the 0~5V square wave signal, so it is necessary to detect the signal conditioning circuit will be on the bus FSK sine wave signal conversion to square wave signal. The main principle is through the septa straight circuit bus DC signal filter, AC current signal and through the sampling resistor variable AC voltage signal, the signal after filtering, into zero circuit sine signal is transformed into a square wave signal.


Due to bus AC current amplitude is + 0.5mA, in order to accurately detect the signal, asking it to 0.25VP-P above the level of and two-wire smart devices and the power supply at least more than 250 ohm resistance, in order to avoid the signal is the low internal resistance of the power supply circuit. In this design, the sampling resistance is 300 precision resistors. On the other hand, because the ADuC7020 received signal level is 0 ~ 5V, so 0V using 24V, OP2177 power supply, with 7812 to obtain the intermediate level 12V, that is, VCC/2. In this way, the AC signal is superimposed on the 12V, and then through the zero comparator and the 12V voltage difference, get the square wave signal of 0 ~ 24V. The signal through a resistance network, the output 0 ~ 5V square wave signal, that is to meet the HT2012 digital signal standard, at this point, the signal can be sent to the demodulation module of the IRXA tube feet.

Recommended ht2012 signal acquisition circuit need band-pass filter, used to filter out the noise of Hart network from the, according to the provisions of the HART protocol and its pass band to design in the 950Hz~2500Hz and remove other frequencies and for waveform shaping processing, sine wave into square wave into the demodulation module ht2012 demodulation.

Actually bandpass filter can not design, can be the function to the ht2012, because ht2012 carrier sensing function of frequency selection, signal interference not within the scope of choices wouldn't of communication cause interference.

2.Output signal conditioning circuit

The main function of the output signal processing circuit is to convert the square wave voltage signal of 0~5V to the signal that meets the requirement of HART protocol. The output signal amplitude is 0 to HT2012, the frequency is 1200Hz (0) and 2200Hz (1) square wave signal. Therefore, the signal to be converted to + 0.5mA, need to use the ADI company's production and HART protocol compatible with the DA conversion chip AD421. In practice, the ht2012 OTXD pin through a capacitor C3 pin AD421 received, by calculating the value of the appropriate capacitor can be 0-5V voltage signal is converted into + 0.5mA sinusoidal current signal is superimposed to Hart bus.


The magnitude of the AC signal on the HART bus is determined by the size of the capacitor C9 and C16. By the AD421 internal current amplifier circuit structure can be known, in order to generate a sine current on the bus, the AC voltage amplitude of the C3 pin should be 20mV.

OP2177 is also an excellent dual op amp which is suitable for the current voltage conversion circuit. It also has the characteristics of low offset voltage and ultra low bias current. ADR02 and ADR03 are also applicable to the low noise reference voltage source, respectively, to provide 5 V and 2.5 V output, and ADR01 belong to a reference voltage source series. Another application of the low noise reference voltage source series is ADR441 and ADR445. The size of the reference input voltage is limited by the rail to rail voltage of the selected op amp.

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