| Partno |
Mfg |
Dc |
Qty |
Available | Descript |
| W9751G6JB-25I |
WINBOND |
N/a |
969 |
 |
|
W9751G6KB-25 , Double Data Rate architecture: two data transfers per clock cycle
W9812G2GB-75 , 1M × 4 BANKS × 32BITS SDRAM
W9812G2GH-6I , a high-speed synchronous dynamic random access memory (SDRAM), organized as 1,048,576 words × 4 banks × 32 bits
W9816G6BB-7 , 512K x 2 BANKS x 16 BITS SDRAM
W9816G6IH-6 , 512K × 2 BANKS × 16 BITS SDRAM
X9258UV24-2.7 , Quad Digital Controlled Potentiometers (XDCP)
X9258UV24-2.7 , Quad Digital Controlled Potentiometers (XDCP)
X9259TS24 , Single Supply/Low Power/256-Tap/2-Wire bus
