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UC2907DWTR from TI, Texas Instruments 80pcs , SOP,Load Share Controller
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UC2907DWTR TI N/a 80
electrical characteristics, these specifications apply for T = –55°C to 125°C for UC1907, –40°C toA85°C for UC2907, and 0°C to 70°C for UC3907, V = 15 V, T = T (unless otherwise stated )IN A JPARAMETER TEST CONDITIONS MIN TYP MAX UNITSVoltage Amp SectionCOMP = 1 V, T = 25°C 1.975 2.000 2.025 VAInp Input voltage t oltageCOMP = 1 V, over temp 1.960 2.000 2.040 VLine regulation V = 4.5 V to 35 V 15 mVINLoad regulation I reference = 0.0 mA to –10 mA 10 mVLLong term stability T = 125°C, 1000hrs See Note 2 5 25 mVATotal output variation Line, load, temp 1.960 2.040Input adjust range ADJ OUT from max high to max low 85 100 115 mVInput bias current –1 µ AOpen loop gain COMP = 0.75 V to 1.5 V 65 dBUnity gain bandwidth T = 25°C See Note 2 700 kHzAOutput sink current (+) SENSE = 2.2 V, COMP = 1 V 6 15 mAOutput source current (+) SENSE = 1.8 V, COMP = 1 V 400 600 µ AV high (+) SENSE = 1.8 V, I = –400 µΑ 1.85 2 VOUT LV low (+) SENSE = 2.2 V, I = 1 mA 0.15 0.40 VOUT LReference SectionT = 25°C 1.970 2.000 2.030 VAOutput voltage O tp t oltageOver operating temp 1.955 2.000 2.045 VShort circuit current VREF = 0.0 V –15 –30 –60 mAGround Amp SectionOutput voltage 200 250 300 mVCommon mode variation (–) SENSE from 0.0 V to 2 V 5 mVI = 0.0 mA to 20 mA, T = 25°C 10 mVL ALoad regulation Load reg lationI = 0.0 mA to 20 mA, over temp 15 mVLAdjust Amp SectionInput offset voltage ADJ OUT = 1.5 V, V = 0.0 V 40 50 60 mVCMInput bias current –2 µ AOpen loop gain 1.5 V ≤ ADJ OUT ≤ 2.25 V 65 dBUnity gain bandwidth T = 25°C, C =1 µ F See Note 2 500 HzA OUTTransconductance I = –10 µ A to 10 µA, V = 1.5 V 1.7 3 4.5 msOUT OUTOutput sink current V = 0.0 V, ADJ OUT = 1.5 V 55 135 225 µ AIDOutput source current V = 250 mV, ADJ OUT = 1.5 V 110 200 350 µ AIDV high V = 250 mV, I = – 50 mA 2.20 2.70 2.90 VOUT ID OUTV low V = 0.0 V, I = 50 mA 0.75 1.15 VOUT ID OUTCommon mode rejection ratio V = 0.0 to 10 V 70 dBCMV ADJ OUT = 1.5 V to 2 V,OUTOutput gain to V/A 50 57 64 mV/V∆ (+) SENSE/ ∆ ADJ OUTNOTE 1: Unless otherwise specified all voltages are with respect to (–) SENSE. Currents are positive into, negative out of the specified terminal.NOTE 2: Ensured by design. Not production tested.3

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