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UC28025N from TI/BB , Texas Instruments 1pcs,Economy High Speed PWM Controller
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UC28025N TI/BB N/a 1
UC28025N from UC, 21pcs , DIP-16,Economy High Speed PWM Controller
SLUS557G–MARCH 2003–REVISED DECEMBER 20165 Pin Configuration and FunctionsUC28023 DW or N Packages UC28025 DW or N Packages16-Pin SOIC or PDIP 16-Pin SOIC or PDIPTop View Top ViewINV 1 16 VREFINV 1 16 VREFNI 2 15 VCCNI 2 15 VCCEAOUT 3 14 OUTEAOUT 3 14 OUTBCLOCK 4 13 VCCLOCK 4 13 VCRT 5 12 PGNDRT 5 12 PGNDCT 6 11 ILIM/REFCT 6 11 OUTARAMP 7 10 GNDRAMP 7 10 GNDSS 8 9 ILIM/SDSS 8 9 ILIM/SDPin FunctionsPINI/O DESCRIPTIONNAME UC28023 UC28025CLOCK 4 4 O Output of the internal oscillatorTiming capacitor connection pin for oscillator frequency programming. The timing capacitorCT 6 6 Imust be connected to the device ground using minimal trace length.EAOUT 3 3 O Output of the error amplifier for compensationGND 10 10 — Analog ground return pin.ILIM/REF 11 — I Pin to set the current limit threshold externally.ILIM/SD 9 9 I Input to the current limit comparator and the shutdown comparator.INV 1 1 I Inverting input to the error amplifierNI 2 2 I Noninverting input to the error amplifierOUT 14 — O High current totem pole output of the on-chip drive stage.OUTA — 11 O High current totem pole output A of the on-chip drive stage.OUTB — 14 O High current totem pole output B of the on-chip drive stagePGND 12 12 — Ground return pin for the output driver stageNoninverting input to the PWM comparator with 1.25-V internal input offset. In voltage modeRAMP 7 7 I operation this serves as the input voltage feedforward function by using the CT ramp. In peakcurrent mode operation, this serves as the slope compensation input.RT 5 5 I Timing resistor connection pin for oscillator frequency programmingSS 8 8 I Soft-start input pin.Power supply pin for the output stage. This pin must be bypassed with a 0.1-µF monolithicVC 13 13 —ceramic low ESL capacitor with minimal trace lengths.Power supply pin for the device. This pin must be bypassed with a 0.1-µF monolithic ceramicVCC 15 15 —low ESL capacitor with minimal trace lengths5.1-V reference. For stability, the reference must be bypassed with a 0.1-µF monolithicVREF 16 16 Oceramic low ESL capacitor and minimal trace length to the ground plane.Copyright 2003–2016, Texas Instruments Incorporated Submit Documentation Feedback 3Product Folder Links: UC28023 UC28025UC28023,UC28025SLUS557G–MARCH 2003–REVISED DECEMBER 2016 Features... 18.4 Device Functional Modes.... 142 Applications..... 19 Application and Implementation...... 153 Description....... 19.1 Application Information........ 154 Revision History........ 29.2 Typical Application..... 155 Pin Configuration and Functions....... 310 Power Supply Recommendations... 176 Specifications... 411 Layout.... 186.1 Absolute
UC28025DW UC 56,Maximum Ratings table...... 4• Added Thermal Information table.... 4• Changed R values for DW (SOIC) package From: 50°C/W to 100°C/W To: 70.5°C/W and ..
UC28025DWG4 TEXAS 1171,Sample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareUC28023,UC28025SLUS557G–MARCH 2003–REVISED DECEMBER 2016UC2802x Econom ..
UC28025DWRG4 TI 3500,Electrical Characteristics....... 512.2 Related Links.. 196.6 Switching Characteristics...... 612.3 Receiving Notification of Documentation Updates 1 ..
UC28025N TI/BB 1, SLUS557G–MARCH 2003–REVISED DECEMBER 20165 Pin Configuration and FunctionsUC28023 DW or N Packages UC28025 DW or N Packages16-Pin SOIC or PDIP 16-Pi ..
UC28025N UC 21,Features... 18.4 Device Functional Modes.... 142 Applications..... 19 Application and Implementation...... 153 Description....... 19.1 Application In ..
UC28025NG4 TEXAS 8,Maximum Ratings(1)(2)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITInput voltage VC, VCC 30 VINV, NI, RAMP –0.3 7Anal ..
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