TSB43DA42AZHC ,IEC61883, 1394a Link Layer Controller integrated with a 1394a, 400Mbps, 2-port Physical Layer (PHY) 196-BGA MICROSTAR -20 to 85SLLS560–FEBRUARY 2007APPLICATION INFORMATIONHDTV ApplicationSDRAM CPUTSB43DA42 Audio DACMPEG2 Trans ..
TSB43DB42 , IEEE 1394a-2000 CONSUMER ELECTRONICS SOLUTION
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TSB81BA3D ,IEEE P1394b Three-Port Cable Transceiver Arbiter 80-HTQFP 0 to 70TSB81BA3D, TSB81BA3DIIEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITERSLLS559E − DECEMBER 2002 − REVI ..
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TSB43DA42-TSB43DA42AZHC
IEC61883, 1394a Link Layer Controller integrated with a 1394a, 400Mbps, 2-port Physical Layer (PHY)
www.ti.com
FEATURES
TSB43DA42, TSB43DB42
SLLS560–FEBRUARY 2007
IEEE 1394a-2000 CONSUMER ELECTRONICS SOLUTION 1394 Features – SRAM-Like 16-Bit Asynchronous Interface
(Supports External DMA Only)– Integrated 400/200/100 Mbps 2-Port PHY PCI Interface (33 MHz) Compliantto PCI– Compliantto IEEE 1394-1995 and IEEE
Specification Version 2.2 (Supports PCI1394a-2000 Standards
Slave and Master Function)– Supports Bus Manager Functions and •
Data BuffersAutomatic 1394 Self-ID Verification 3x 4K Byte Isochronous Buffers for Audio– Separate Asyncchronous Ack FIFOs
and Video DataDecrease the Ack-Tracking Burden on
External CPU – 2x 2K Byte Asynchronous/Asynchronous
Stream Transmit Buffers•
DTLA Encryption Support for MPEG2-DVB,
DSS, and Audio Data (TSB43DA42 Only) – 2x 2K Byte Asynchronous/Asynchronous
Stream Receive Buffers– Support for upto Three
Encrypted/Decrypted Streamsat One Time – 1x 1K Byte Self-ID Buffer Full Ake Performed With Hardware Assist – Insertion Buffers for MPEG2 Packet
Insertion (DAT, PMT, SIT, and DIT)– Secure Method for Loading DTLA
Information Using Ex-CPU Interface – Programmable Data/Space Available
Indicators for Buffer Flow Control•
Audio and Video Interfaces Hardware Packet Formatting for the Following– Three Configurable High-Speed Data Ports Standardsfor Video Data IEC61883-1 (General)– Two Ports Configurableas Parallelor
Serial – IEC61883-2 (SD-DVCR) One Port Serial Only – IEC61883-4 (MPEG2-TS) Two Interfaces for Audio Data (Only One – IEC61883-6 (Audio and Music)
Audio Stream Supportedata Time) – IEC61883-7 (ITU-R BO.1294 SystemB)– 60958 Port DSS I2S-Style DAC Interface for PCM Data – Asynchronous Packets
(Two Channel) – Asynchronous Streams Pass-Through Modes for HSDI0 and HSDI1 – PHY Packets (Including Self-IDs) Packet Insertion– Two Insertion Buffers •
Additional Featuresper HSDI – JTAG Interfaceto Support Post-Assembly PID Filtering (32 PID Filters per HSDI Port) Scanof Device I/O– Boundary Scan External CPU Interfaces – Unique Binding Method for Protecting Motorola 68K-Style 16-Bit Asynchronous Sensitive Off-Chip Data From Ex-CPU
Interface (Supports External DMA Only) Interface
