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TPA5050RSAR-TPA5050RSAT
Stereo Digital Audio Delay Processor With I2C Control
A5050
www.ti.com
FEATURES APPLICATIONS
DESCRIPTION
SIMPLIFIED APPLICATION DIAGRAM
Digital Amplifier
Audio Processor
SCLK
TAS5504A
TPA5050
SLOS492B–MAY 2006–REVISED MAY 2007
STEREO DIGITAL AUDIO LIP-SYNC DELAY High Definition•
Digital Audio Formats: 16-24-bitI2S,
Right-Justified, Left-Justified •
Flat Panel Home•
I2C Bus Controlled Wireless•
Single Serial Input Port Synchronization•
Delay Time: 170 ms/chatfs=48 kHz Delay Resolution: One Sample Delay Memory Cleared on Power-Upor After The TPA5050
Delay Changes buffers the
– Eliminates Erroneous Data From Being outputs the
Output output. One
(fs=48 kHz)•
3.3V Operation With5V Tolerant I/O andI2C video stream
Control processing•
Supports Audio Bit Clock Ratesof32to64fs devices can
withfs=32 kHz–192 kHz No external crystalor oscillator required All Internal Clocks Generated From the
Audio Clock Surface Mount 4mm×
4mm, 16-pin QFN
Package
