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TPA270RL
TRISIL FOR TELECOM EQUIPMENT PROTECTION
1/10
SMP50 / SMTPA / TPATRISIL™ FOR TELECOM EQUIPMENT PROTECTION
REV. 1
November 2004
FEATURES Bidirectional crowbar protection Voltage range from 62V to 270V Low capacitance from 12pF to 20pF @ 50V Low leakage current : IR = 2µA max Holding current: IH = 150 mA min Repetitive peak pulse current :
IPP = 50 A (10/1000µs)
MAIN APPLICATIONSTelecommunication equipment such as: Analog and digital line cards (xDSL, T1/E1,
ISDN, ...) Terminals (phone, fax, modem, ...) and central
office equipment
DESCRIPTIONThese Trisil series have been designed to protect
telecommunication equipment against lightning
and transient induced by AC power lines.
They are available in SMA, SMB and DO-15
packages.
BENEFITSTrisils are not subject to ageing and provide a fail
safe mode in short circuit for a better protection.
They are used to help equipment to meet various
standards such as UL1950, IEC950 / CSA C22.2,
UL1459 and FCC part 68.
Trisils have UL94 V0 approved resin.
SMA and SMB packages are JEDEC registered
(DO-214AC and DO-214AA).
Trisils are UL497B approved (file: E136224).
Table 1: Order Codes
Figure 1: Schematic Diagram
SMP50 / SMTPA / TPA
Table 2: In compliances with the following standards
Table 3: Absolute Ratings (Tamb = 25°C)
Note 1: in fail safe mode, the device acts as a short circuit
SMP50 / SMTPA / TPA3/10
Table 4: Thermal Resistances
Table 5: Electrical Characteristics (Tamb = 25°C)
Note 1: IR measured at VR guarantee VBR min ≥ VR
Note 2: see functional test circuit 1
Note 3: see test circuit 2
Note 4: see functional holding current test circuit 3
Note 5: VR = 50V bias, VRMS=1V, F=1MHz
Note 6: VR = 2V bias, VRMS=1V, F=1MHz
SMP50 / SMTPA / TPA
Figure 2: Pulse waveform (10/1000µs) Figure 3: Non repetitive surge peak on-state
current versus overload duration
Figure 4: On-state voltage versus on-state
current (typical values)
Figure 5: Relative variation of holding current
versus junction temperature
Figure 6: Relative variation of breakover
voltage versus junction temperature
Figure 7: Relative variation of leakage current
versus reverse voltage applied (typical values)
SMP50 / SMTPA / TPA5/10
Figure 8: Variation of thermal impedance
junction to ambient versus pulse duration
(Printed circuit board FR4, SCu=35µm,
recommended pad layout)
Figure 9: Relative variation of junction
capacitance versus reverse voltage applied
(typical values)
Figure 10: Test circuit 1 for Dynamic IBO and VBO parameters
SMP50 / SMTPA / TPA
Figure 12: Test circuit 3 for dynamic IH parameters
Figure 11: Test circuit 2 for IBO and VBO parameters
