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TP11362AVNSN/a50avaiQuad Adaptive Differential PCM Processor


TP11362AV ,Quad Adaptive Differential PCM ProcessorPin DescriptionsMaster clock input. CLK may be asynchronous to PSCK orASCK.TSITransmit PCM serial d ..
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TP11362AV
Quad Adaptive Differential PCM Processor
TP11362A
Quad Adaptive Differential PCM Processor
General Description

The TP11362Aisa quad(4) channel Adaptive Differential
Pulse Code Modulation (ADPCM) transcoder, fully compat-
ibleto ITU G.726 recommendationin40 kbps,32 kbps, kbps,16 kbpsand ANSI32 kbps modes.The TP11362A
ADPCM processor can operateonupto8 independent
channelsinan8 kHz frame. Each channelis individually
configured, supporting bothfullandhalf duplex operation.All
input/output transfers occuronan interrupt basis usingse-
rial, double buffered data registers. Togetherwith National’s
TP3054/57 COMBO®or TP3070/71 COMBOII devices,the
TP11362A forms complete ADPCM channels with Codec/
filtering.
Features
CCITT G.726 compatibleat40,32,24,16 kbps ANSI T1.301 compatibleat32 kbps 8-channel half-duplex (encodeor decode)or 4-channel
full-duplex operationin8kHz frame Each channel individually configurable Selectable μ-lawor A-law PCM coding Asynchronous8 MHz master clock operation TTLand CMOS compatible inputsand outputs 28-pin PLCCor 24-pinDIP packages Power consumptionoftyp.6 mWat +5Vper full-duplex
channel On-Chip Power-On-Reset −40˚Cto +85˚C operating temperature range Single5V supply
Block Diagram

TRI-STATE®and COMBO®are registeredtrademarksof National Semiconductor Corporation.
DS012877-1
FIGURE1. Block Diagram

March 1997
TP1
1362A
Quad
Adaptive
Differential
PCM
Processor

©1997NationalSemiconductor Corporation DS012877
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