TMS320DM6443ZWT ,DaVinci Digital Media System-on-Chip 361-NFBGA SPRS282G–DECEMBER 2005–REVISED AUGUST 20101.2 DescriptionThe TMS320DM6443 (also referenced as DM64 ..
TMS320DM6443ZWT ,DaVinci Digital Media System-on-Chip 361-NFBGA • External Memory Interfaces (EMIFs) • 10/100 Mb/s Ethernet MAC (EMAC)– 32-Bit DDR2 SDRAM Memory Co ..
TMS320DM6446AZWT ,DaVinci Digital Media System-on-Chip 361-NFBGA 0 to 85 SPRS283H–DECEMBER 2005–REVISED SEPTEMBER 2010TMS320DM6446Digital Media System-on-ChipCheck for Sam ..
TMS320DM6446AZWTA ,DaVinci Digital Media System-on-Chip 361-NFBGA -40 to 105FeaturesProcessing– Byte-Addressable (8-/16-/32-/64-Bit Data)• Glueless Interface to Common Video– ..
TMS320DM6446BZWT8 ,DaVinci Digital Media System-on-Chip 361-NFBGA 0 to 85• Video Processing Subsystem (Continued) • One Serial Peripheral Interface (SPI) With TwoChip-Selec ..
TMS320DM6446ZWT ,DaVinci Digital Media System-on-Chip 361-NFBGA 0 to 85Features12• High-Performance Digital Media SoC • C64x+ L1/L2 Memory Architecture– 513-, 594-, 810-M ..
TPS54310PWPRG4 ,3V to 6V Input, 3A Synchronous Step-Down SWIFT? Converter 20-HTSSOP -40 to 125features are a true,• Externally Compensated for Design Flexibility high performance, voltage error ..
TPS54310QPWPRQ1 ,Q1 TPS54310-Q1SGLS280D − JANUARY 2005 − REVISED JUNE 2009RECOMMENDED OPERATING CONDITIONSMIN NOM MAX ..
TPS54310QPWPRQ1 ,Q1features are a true, high-performance,1% Accuracyvoltage error amplifier that provides high perform ..
TPS54311PWP ,Low Input Voltage 3A Synchronous Buck Converter with 0.9V Output SLVS416C–FEBRUARY 2002–REVISED JANUARY 20155 Pin Configuration and FunctionsPWP Package20-Pin HTSS ..
TPS54312PWP ,Q1
TPS54312PWP ,Q1
TMS320DM6443AZWT-TMS320DM6443ZWT
DaVinci Digital Media System-on-Chip
TMS320DM6443
www.ti.com SPRS282G–DECEMBER 2005–REVISED AUGUST 2010
TMS320DM6443
Digital Media System-on-Chip
Checkfor Samples: TMS320DM6443 Digital Media System-on-Chip (DMSoC)
1.1 Features High-Performance Digital Media SoC • C64x+ L1/L2 Memory Architecture 594-MHz C64x+™ Clock Rate – 32K-Byte L1P Program RAM/Cache (Direct
Mapped)– 297-MHz ARM926EJ-S™ Clock Rate 80K-Byte L1D Data RAM/Cache (2-Way– Eight 32-Bit C64x+ Instructions/Cycle
Set-Associative)– 4752 C64x+ MIPS – 64K-ByteL2 Unified Mapped RAM/Cache– Fully Software-Compatible With C64x/ (Flexible RAM/Cache Allocation)ARM9™ • ARM926EJ-S Core• Advanced Very-Long-Instruction-Word (VLIW) – Support for 32-Bit and 16-Bit (Thumb®TMS320C64x+™ DSP Core Mode) Instruction Sets– Eight Highly Independent Functional Units – DSP Instruction Extensions and Single Cycle• Six ALUs (32-/40-Bit), Each Supports MACSingle 32-Bit, Dual 16-Bit,or Quad 8-Bit ARM® Jazelle® TechnologyArithmetic per Clock Cycle EmbeddedICE-RT™ Logic for Real-Time• Two Multipliers Support Four16x 16-Bit DebugMultiplies (32-Bit Results) per Clock
Cycleor Eight8x 8-Bit Multiplies (16-Bit • ARM9 Memory Architecture
Results) per Clock Cycle – 16K-Byte Instruction Cache Load-Store Architecture With Non-Aligned – 8K-Byte Data CacheSupport – 16K-Byte RAM– 64 32-Bit General-Purpose Registers – 8K-Byte ROM Instruction Packing Reduces Code Size • Emulation Trace Buffer™ (ETB11™) With 4-KB– All Instructions Conditional Memory for ARM9 Debug Additional C64x+™ Enhancements • Endianness: Little Endian for ARM and DSP Protected Mode Operation • Video Processing Subsystem Exceptions Support for Error Detection – Resize Engine Provides: • Resize Images From 1/4xto4x Loop • Separate Horizontal and Vertical Control – Back End Provides: Features • Hardware On-Screen Display (OSD) fora Combinationof – Composite NTSC/PAL Video – Luma/Chroma Video (S-video)– Compact 16-Bit – Componentor Video Complex (Progressive) • Digital Output 8-/16-Bit 24-Bit Resolution Upto2 Video Windows
