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Partno Mfg Dc Qty AvailableDescript
TLC5510INSTIN/a91avai 8-BIT, 20 MSPS ADC SINGLE CH., INTERNAL S&H, LOW POWER
TLC5510INSLETIN/a2100avai8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Power
TLC5510INSRTIN/a10000avai8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Power
TLC5510IPWTIN/a5000avai8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Power
TLC5510IPWRTIN/a8000avai8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Power


TLC5510INSR ,8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Powerblock diagramResistorReferenceOEDividerREFB270 ΩNOMLower SamplingREFTLower EncoderD1(LSB)Comparator ..
TLC5510IPW ,8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Powermaximum ratingsSupply voltage, V , V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
TLC5510IPWR ,8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Powerelectrical characteristics and text). For the 4 V input range of the TLC5510A, thereference voltage ..
TLC551CD ,LinCMOS(TM) Timerblock diagramSource 10 mA TypCONT* Output Fully Compatible With CMOS, TTL, RESET5 4Vand MOSDD8* Low ..
TLC551CDG4 ,LinCMOS(TM) Timer 8-SOIC 0 to 70maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
TLC551CP ,LinCMOS(TM) Timerelectrical characteristics.TLC551Y chip informationThis chip, when properly assembled, displays cha ..
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TMP47C860N , CMOS 4-BIT MICROCONTROLLER


TLC5510INS-TLC5510INSLE-TLC5510INSR-TLC5510IPW-TLC5510IPWR
8-Bit, 20 MSPS ADC Single Ch., Internal S&H, Low Power
8-Bit Resolution Integral Linearity Error±0.75 LSB Max (25°C)
±1 LSB Max (–20°C to 75°C) Differential Linearity Error
±0.5 LSB Max (25°C)
±0.75 LSB Max (–20°C to 75°C) Maximum Conversion Rate
20 Mega-Samples per Second
(MSPS) Max
TLC5510 is Interchangeable With Sony
CXD1175
applications
Digital TV Medical Imaging Video Conferencing High-Speed Data Conversion QAM Demodulators

description

The TLC5510 and TLC5510A are CMOS, 8-bit, 20
MSPS analog-to-digital converters (ADCs) that
utilize a semiflash architecture. The TLC5510 and
TLC5510A operate with a single 5-V supply and
typically consume only 130 mW of power.
Included is an internal sample-and-hold circuit,
parallel outputs with high-impedance mode, and
internal reference resistors.
The semiflash architecture reduces power
consumption and die size compared to flash
converters. By implementing the conversion in a
2-step process, the number of comparators is
significantly reduced. The latency of the data
output valid is 2.5 clocks.
The TLC5510 uses the three internal reference
resistors to create a standard, 2-V, full-scale
conversion range using V DDA . Only external jumpers are required to implement this option and eliminates the
need for external reference resistors. The TLC5510A uses only the center internal resistor section with an
externally applied 4-V reference such that a 4-V input signal can be used. Differential linearity is 0.5 LSB at 25°C
and a maximum of 0.75 LSB over the full operating temperature range. Typical dynamic specifications include
a differential gain of 1% and differential phase of 0.7 degrees.
The TLC5510 and TLC5510A are characterized for operation from –20°C to 75°C.
AVAILABLE OPTIONS

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DGND
D1(LSB)
D8(MSB)
VDDD
CLK
DGND
REFB
REFBS
AGND
AGND
ANALOG IN DDA
REFT
REFTS DDA
VDDA DDD
PW OR NS PACKAGE†
(TOP VIEW)
Available in tape and reel only and ordered
as the shown in the Available Options table
below.
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