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TLC3578IPW ,Serial Out, Low Power with Built-In Conversion Clock & 8x FIFO, 8 Channelsblock diagramDV AVDD DDREFPCOMPREFM† ‡X8 X4A0 A0FIFOSARAnalogA1 A1X8ADCMUXA2 A2SignalA3 A3 OSCScali ..
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TLC3574IDW-TLC3574IDWG4-TLC3574IPW-TLC3574IPWG4
Serial Out, Low Power with Built-In Conversion Clock & 8x FIFO, 4 Channels
SDI
EOC/INT
SDO
DGND
DVDD
AGND
COMP
REFM
REFP
AGND
AVDD
SCLK
SDI
EOC/INT
SDO
DGND
DVDD
CSTARTDD
AGND
COMP
REFM
REFP
AGNDDD
TLC3574, TLC2574
DW, N, OR PW PACKAGE
(TOP VIEW)
TLC3578/2578
− 4 Single-Ended Channels for
TLC3574/2574
Analog Input Range: ±10 V Pseudodifferential Analog Inputs SPI/DSP-Compatible Serial Interfaces With
SCLK up to 25-MHz
Built-In Conversion Clock and 8x FIFO Single 5-V Analog Supply; 3-/5-V Digital
Supply
Low-Power
− 5.8 mA in Normal Operation
− 20 µA in Power Down
Programmable Autochannel Sweep and
Repeat
Hardware-Controlled, Programmable
Sampling Period
Hardware Default Configuration INL: TLC3574/78: ±1 LSB;
TLC2574/78: ±0.5 LSB
DNL: TLC3574/78: ±0.5 LSB;
TLC2574/78: ±0.5 LSB
SINAD: TLC3574/78: 79 dB;
TLC2574/78: 72 dB
THD: TLC3574/78: −82 dB;
TLC2574/78: −82 dB


description

The TLC3574, TLC3578, TLC2574, and TLC2578 are a family of high-performance, low-power, CMOS
analog-to-digital converters (ADC). TLC3574/78 is a 14-bit ADC; TLC2574/78 is a 12-bit ADC. All parts operate
from single 5-V analog power supply and 3-V to 5-V digital supply. The serial interface consists of four digital
input [chip select (CS), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state
serial data output (SDO). CS (works as SS, slave select), SDI, SDO and SCLK form an SPI interface. FS, SDI,
SDO, and SCLK form DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being
transferred. When multiple converters connect to one serial port of a DSP , CS works as the chip select to allow
the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must
be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD , the device is set in
hardware default mode after power on and no software configuration is required. In the simplest case, only three
wires (SDO, SCLK, and CS or FS) are needed to interface with the host.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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