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THS1206IDA ,12-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP IF, Integ. 16x FIFO, Channel AutoScan, Low Powermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
THS1206IDA ,12-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP IF, Integ. 16x FIFO, Channel AutoScan, Low PowerTHS1206SLAS217H – MAY 1999 – REVISED JULY 2003#ORDERING INFORMATIONThese devices have limited built ..
THS1206IDA G4 ,12-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP IF, Integ. 16x FIFO, Channel AutoScan, Low Power 32-TSSOP -40 to 85MAXIMUM RATINGS(1)over operating free-air temperature range unless otherwise notedTHS1206DGND to DV ..
THS1206IDAG4 ,12-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP IF, Integ. 16x FIFO, Channel AutoScan, Low Power 32-TSSOP -40 to 85THS1206SLAS217H – MAY 1999 – REVISED JULY 2003#RECOMMENDED OPERATING CONDITIONSPOWER SUPPLY MIN NOM ..
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THS1206CDA-THS1206IDA-THS1206IDA G4-THS1206IDAG4
12-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP IF, Integ. 16x FIFO, Channel AutoScan, Low Power
THS1206
SLAS217H – MAY 1999 – REVISED JULY 2003#
12-BIT, 4 ANALOG INPUT , 6 MSPS, SIMULTANEOUS SAMPLINGANA-
LOG-TO-DIGITAL CONVERTERS

FEATURES
High-Speed 6 MSPS ADC 4 Analog Inputs Simultaneous Sampling of 4 Single-Ended
Signals or 2 Differential Signals or
Combination of Both
Differential Nonlinearity Error: ±1 LSB Integral Nonlinearity Error: ±1.5 LSB Signal-to-Noise and Distortion Ratio: 68 dB
at fI = 2 MHz
Auto-Scan Mode for 2, 3, or 4 Inputs 3-V or 5-V Digital Interface Compatible Low Power: 216 mW Max 5-V Analog Single Supply Operation Internal Voltage References ... 50 PPM/°C
and ±5% Accuracy
Glueless DSP Interface Parallel μC/DSP Interface Integrated FIFO Available in TSSOP Package Pin Compatible Upgrade to THS10064
APPLICATIONS
Radar Applications Communications Control Applications High-Speed DSP Front-End Automotive Applications
DESCRIPTION

The THS1206 is a CMOS, low-power, 12-bit, 6 MSPS
analog-to-digital converter (ADC). The speed, resolution,
bandwidth, and single-supply operation are suited for
applications in radar, imaging, high-speed acquisition, and
communications. A multistage pipelined architecture with
output error correction logic provides for no missing codes
over the full operating temperature range. Internal control
registers are used to program the ADC into the desired
mode. The THS1206 consists of four analog inputs, which
are sampled simultaneously. These inputs can be selected
individually and configured to single-ended or differential
inputs. An integrated 16 word deep FIFO allows the
storage of data in order to take the load off of the processor
connected to the ADC. Internal reference voltages for the
ADC (1.5 V and 3.5 V) are provided.
An external reference can also be chosen to suit the dc
accuracy and temperature drift requirements of the
application. Two different conversion modes can be
selected. In single conversion mode, a single and
simultaneous conversion of up to four inputs can be
initiated by using the single conversion start signal
(CONVST). The conversion clock in single conversion
mode is generated internally using a clock oscillator
circuit. In continuous conversion mode, an external clock
signal is applied to the CONV_CLK input of the THS1206.
The internal clock oscillator is switched off in continuous
conversion mode.
The THS1206C is characterized for operation from 0°C to
70°C while the THS1206I is characterized for operation
from –40°C to 85°C. The THS1206Q is characterized to
meet the rigorous requirements of the automotive
environment from –40°C to 125°C. The THS1206M is
characterized for operation over the full military
temperature range of –55°C to 125°C.
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