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TEF6730AHW
Front-end for digital-IF car radio
General descriptionThe TEF6730A is a car radio tuner front-end for digital-IF reception, especially designed
for co-operation with digital-IF DSP back-ends of the SAF773x and SAF778x families.
The FM tuner features single conversiontoIF= 10.7 MHz and integrated image rejection;
capable for FM 65 MHz to 108 MHz and weather band reception. The AM tuner features
single conversion to IF= 10.7 MHz with an integrated AM front-end, capable for LW, MW
and full SW reception. A combined AM/FM IF AGC amplifier provides a suitable IF signal
to the ADC in IF DSP.
The device can be controlled via the fast-mode I2 C-bus (400 kHz) and includes
autonomous tuning functions for easy control. No manual alignments are required.
Features FM mixer for conversion of FM RF to IF 10.7 MHz with large dynamic range, high
image rejection and selectable mixer gain Selectable high or low injection of LO AGC PIN diode drive circuit for FM RF AGC with detection at RF and IF , including
keyed AGC function RF input for weather band applications Integrated AM front-end LNA Integrated AM RF AGC for low desensitization and AGC PIN diode drive circuit with
detection at RF and IF AM mixer for conversion of AM RF to IF 10.7 MHz AM/FM IF AGC amplifier with large dynamic range, gain controlled from IF DSP AM and FM front-end AGC information is available via the I2 C-bus Low phase noise local oscillator with reliable start-up behavior In-lock detection for optimized adaptive PLL tuning speed Programmable divider and mixer dividers for reception of FM (65 MHz to 108 MHz),
weather band, AM LW, MW and full SW Two antenna DAAs Sequential state machine supporting all tuning actions including AFU for RDS Interfacing signals for IF AGC, FM keyed AGC, AFU and reference frequency to DSP for optimum system performance Software controlled flag outputs Selection of four I2 C-bus addresses Qualified in accordance with AEC-Q100
TEF6730A
Front-end for digital-IF car radio
Rev. 01 — 21 February 2007 Product data sheet
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio Quick reference data
Table 1. Quick reference dataVCCA= 8.5 V; Tamb =25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Supply voltageVCCA analog supply voltage on pins VCC, VCC(PLL), VCC(VCO), VCC(RF),
VCC(IF), FMMIXOUT1, FMMIXOUT2,
AMMIXOUT1 and AMMIXOUT2 8.5 9 V
Current in FM modeICC(tot) total supply current - 85.3 - mA
Current in AM modeICC(tot) total supply current - 114.7 - mA
Antenna Digital Auto Alignment (DAA)DAA1: pin DAAOUT1[1]
Gconv(DAA) DAA conversion gain 0.1 - 2
DAA2: pin DAAOUT2[2]
Gconv(DAA) DAA conversion gain 0.7 - 1.35
Reference frequencyExternal reference frequency, circuit inputs: pins FREF1 and FREF2
fext external frequency - 100 - kHz
Tuning system; see Table 28, Table 29, Table 30 and Table31Voltage controlled oscillator
fVCO(min) minimum VCO frequency [3]- - 130 MHz
application according to Figure25 [3]- - 159.9 MHz
fVCO(max) maximum VCO frequency [3] 256 - - MHz
C/N carrier-to-noise ratio fVCO= 200 MHz;Δf=10 kHz; Q=30 94 98 - dBc/√Hz
Timings
ttune tuning time Europe FM and US FM band;
fref= 100 kHz; fRF= 87.5 MHz to
108 MHz 0.75 1 ms
AM MW band; fref=20 kHz;
fRF= 0.53 MHz to 1.7 MHz
--10 ms
tupd(AF) AF update time cycle time for inaudible AF update
including1ms mute start and1 ms mute
release time 6 6.5 ms
AM overall system parameters[4]fi(RF) RF input frequency LW 144 - 288 kHz 522 - 1710 kHz 2.3 - 26.1 MHz
fIF IF frequency - 10.7 - MHz
Vsens sensitivity voltage (S+N)/N=26dB - 50 - μV
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio[1] Conversion gain formula of DAA1: where n=0to 127.
Vi(RF) RF input voltage start level of wideband AGC
data byte AGC bits WBAGC[1:0]=00 - 125 - mV
data byte AGC bits WBAGC[1:0]=01 - 100 - mV
data byte AGC bits WBAGC[1:0]=10 - 75 - mV
data byte AGC bits WBAGC[1:0]=11 - 35 - mV
Vi(RF)M peak RF input voltage start level of narrow-band AGC; m=0
data byte AGC bits NBAGC[1:0]=00 - 200 - mV
data byte AGC bits NBAGC[1:0]=01 - 170 - mV
data byte AGC bits NBAGC[1:0]=10 - 140 - mV
data byte AGC bits NBAGC[1:0]=11 - 115 - mV
IP2 second-order intercept point referenced to receiver input - 152 - dBμV
IP3 third-order intercept point referenced to receiver input=40 kHz - 130 - dBμV= 100 kHz - 133 - dBμV
αripple ripple rejection VCC(ripple) /Vaudio; fripple= 100 Hz;
VCC(ripple)=10 mV (RMS);
Vi(RF) =1mVto1V
-40 - dB
FM overall system parameters[5]fi(RF) RF input frequency FM standard 65 - 108 MHz
weather band 162.4 - 162.55 MHz
fIF IF frequency - 10.7 - MHz
Vsens sensitivity voltage BIF= 170 kHz - 2 - μV
threshold extension enabled; weak signal
handling enabled (SAF7730 N231) 1.1 - μV
Vi(RF) RF input voltage start level of wideband AGC
data byte AGC bits WBAGC[1:0]=00 - 19 - mV
data byte AGC bits WBAGC[1:0]=01 - 14 - mV
data byte AGC bits WBAGC[1:0]=10 - 10 - mV
data byte AGC bits WBAGC[1:0]=11 - 7 - mV
Vi(RF)M peak RF input voltage start level of narrow-band AGC; m=0
data byte AGC bits NBAGC[1:0]=00 - 17 - mV
data byte AGC bits NBAGC[1:0]=01 - 14 - mV
data byte AGC bits NBAGC[1:0]=10 - 11 - mV
data byte AGC bits NBAGC[1:0]=11 - 9 - mV
IP3 third-order intercept point Δf= 400 kHz - 123 - dBμV
αripple ripple rejection VCC(ripple) /Vaudio; fripple= 100 Hz;
VCC(ripple)=10 mV (RMS);
Vi(RF)= 500μV
-64 - dB
Table 1. Quick reference data …continued
VCCA= 8.5 V; Tamb =25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified. DAAOUT1 1.915 n
128---------× 0.1+ Vtune×=
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio[2] Conversion gain formula of DAA2: where n=0to15.
[3] The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK.
[4] Basedon15 pF/60pF dummy aerial, voltagesat dummy aerial input, fmod= 400 Hz,2.5 kHz audio bandwidth, fi(RF)= 990 kHz,m=0.3
and nominal maximum IF AGC gain, unless otherwise specified.
[5] Based on 75 Ω dummy aerial, voltages at dummy aerial input, fmod= 400 Hz, de-emphasis=50 μs, fi(RF)= 97.1 MHz,Δf= 22.5 kHz,
nominal mixer gain and nominal maximum IF AGC gain, unless otherwise specified.
Ordering information DAAOUT2 0.693 n------× 0.7+ VDAAOUT1×=
Table 2. Ordering informationTEF6730AHW HTQFP64 plastic thermal enhanced thin quad flat package; 64 leads;
body10x10x1 mm; exposed die pad
SOT855-1
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NXP Semiconductors TEF6730A
Front-end for digital-IF car radio Block diagram
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio Pinning information
6.1 Pinning
6.2 Pin description
Table 3. Pin descriptionAMIFAGCIN 1 IFAGC amplifier AM input (10.7 MHz)
FMIFAGCIN1 2 IFAGC amplifier FM input 1 (10.7 MHz)
FMIFAGCIN2 3 IFAGC amplifier FM input 2 (10.7 MHz)
IFAGCDEC 4 IF AGC amplifier AM and FM decoupling
SWDEC 5 ceramic filter switch decoupling
CFSW1 6 ceramic filter switch1
CFSW2 7 ceramic filter switch2
FMMIXOUT1 8 FM mixer IF output 1 (10.7 MHz)
AMMIXOUT2 9 AM mixer IF output 2 (10.7 MHz)
NXP Semiconductors TEF6730A
Front-end for digital-IF car radioFMMIXOUT2 10 FM mixer IF output 2 (10.7 MHz)
AMMIXOUT1 11 AM mixer IF output 1 (10.7 MHz)
VCC(RF) 12 AM/FM RF supply voltage
V50LNA 13 AM LNA supply voltage decoupling
LNAIN 14 AM LNA input
AGCCNTRL 15 AM LNA AGC pin
i.c. 16 internally connected; leave open
LNAOUT 17 AM LNA output
i.c. 18 internally connected; leave open
LNAAGCDEC 19 AM LNA AGC decoupling
AMMIXDEC 20 AM mixer decoupling
AMMIXIN 21 AM mixer input
TAMAGC 22 AM RF AGC time constant
PINAGCDEC 23 AM PIN diode AGC decoupling
IAMAGC 24 AGC current for AM PIN diode
RFGND 25 RF ground
FMMIXIN1 26 FM mixer input1
FMMIXIN2 27 FM mixer input2
WXMIXIN 28 weather band mixer input
WXMIXDEC 29 weather band mixer decoupling
IFMAGC 30 AGC current for FM PIN diode
TFMAGC 31 FM RF AGC time constant
DAAOUT1 32 antenna DAA output1
DAAOUT2 33 antenna DAA output2
KAGC 34 level input for FM keyed AGC function
VTUNE 35 tuning voltage input antenna DAA
CPOUT 36 charge pump output
VCC(PLL) 37 tuning PLL supply voltage
VCOGND 38 VCO ground
OSCFDB 39 VCO feedback
OSCTNK 40 VCO tank circuit
VCC(VCO) 41 VCO supply voltage
SWPORT 42 software controllable port output
AFSAMPLE 43 AF sample flag output
AFHOLD 44 AF hold flag output and input
FGND 45 reference frequency ground
ADDR2 46 address select input2
ADDR1 47 address select input1
i.c. 48 internally connected; leave open
i.c. 49 internally connected; leave open
SDA 50 I2 C-bus data line input and output
Table 3. Pin description …continued
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio Functional description
7.1 FM mixer 1The FM quadrature mixer converts FM RF (65 MHz to 108 MHz) to an IF frequency of
10.7 MHz. The FM mixer provides high image rejection, a large dynamic range and
selectable mixer gain. The image rejection can be selected between low injection of LO
and high injection of LO via the I2 C-bus independently of the band selection. A separate
RF input for weather band is available.
7.2 FM RF AGCAGC detection is at the FM front-end mixer input and the AM/FM IF AGC amplifier input,
both with programmable AGC thresholds. When the thresholdis exceeded, the PIN diode
drive circuit sourcesa currenttoan external PIN diode circuit, keeping the RF signal level
constant.
Keyed AGC function is selectable via the I2 C-bus and uses the in-band level information
from the IF DSP.
The AGC PIN diode drive circuit can optionally deliver a fixed current as a local function. AM mode, the AGC PIN diode drive circuit canbe setto generatea fixed source current
into the external FM PIN diode circuitry.
7.3 Antenna DAA1 and DAA2The antenna DAA1 measures the VCO tuning voltage and multiplies it with a factor
defined by the 7-bit DAA1 setting to generate a tuning voltage for the FM antenna tank
circuit. If a second FM tank circuit is applied, the tuning voltage can be derived from the
antenna DAA2 output. The antenna DAA2 measures the output voltage of the antenna
DAA1 and multiplies it with a factor defined by the 4-bit DAA2 setting.
SCL 51 I2 C-bus clock line input
DGND 52 digital ground
FREF1 53 reference frequency input1
FREF2 54 reference frequency input2
VREF 55 reference voltage noise decoupling
GND 56 ground
VCC 57 supply voltage (8.5V)
IFOUT1 58 IF AGC amplifier output1
IFOUT2 59 IF AGC amplifier output2
IFAGCMSB 60 MSB input for IF AGC amplifier gain setting
IFAGCLSB 61 LSB input for IF AGC amplifier gain setting
VCC(IF) 62 IF AGC amplifier supply voltage
IFGND 63 IF AGC amplifier ground
IFAGCBIAS 64 bias voltage decoupling for IF AGC amplifier
Table 3. Pin description …continued
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
7.4 AM LNAThe AM low noise amplifier is fully integrated.
7.5 AM RF AGCThe AM RF AGC is partially integrated. Detection is at the output of the AM LNA and at
the input of the AM/FM IF AGC amplifier, both with programmable thresholds. First the
integrated AGC reduces the gain of the LNA. After the LNA AGC, the PIN diode AGC
takes over by sinking a current via an external PIN diode.
In FM mode, the AM AGC can be set to a fixed attenuation.
7.6 AM mixerThe large dynamic range AM mixer converts AM RF (144 kHz to 26.1 MHz) to an IF
frequency of 10.7 MHz.
7.7 VCO and dividersThe varactor tuned LC oscillator together with the dividers provides the LO signalfor both
AM and FM front-end mixers. The VCO has an operating frequency of approximately
160 MHz to 256 MHz. In FM mode the LO frequency is divided by 2 or 3. These dividers
generate in-phase and quadrature-phase output signals used in the FM front-end mixer
for image rejection. In weather band mode the LO signal is directly phase shifted to
generate the in-phase and quadrature-phase signals. In AM mode the LO frequency is
divided by 6, 8, 10, 16 or 20 depending on the selected AM band.
7.8 Tuning PLLThe tuning PLL locks the VCO frequency dividedby the programmable divider ratioto the
reference frequency. Due to the combination of different charge pump signals in the
PLL loop filter, the loop parameters are adapted dynamically. T uning to different frequencies is done by changing the programmable divider ratio. The tuning step size
is selected with the reference frequency divider setting.
7.9 AM/FM IF AGC amplifierThe combined AM/FM IF AGC amplifier delivers a suitable IF signal for the ADC in the DSP . The maximum gain of the IF AGC amplifier can be selected via the I2 C-bus. The
gainof this amplifieris automatically adapted via interfacing signals from theIF DSP. The
IF AGC amplifier has three signal inputs, two for FM and one for AM. This allows the
application of multiple external filters, e.g. with different bandwidths.
I2 C-bus protocol
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.1 Read mode
Read data is loaded into the I2 C-bus register at the preceding acknowledge clock pulse.
8.1.1 Read mode: data byte TUNER
Table 4. Description of I2 C-bus format START condition
Slave address W 1100 0000b for pin ADDR2 and pin ADDR1 grounded
1100 0010b for pin ADDR2 grounded and pin ADDR1 floating
1100 0100b for pin ADDR2 floating and pin ADDR1 grounded
1100 0110b for pin ADDR2 and pin ADDR1 floating
Slave address R 1100 0001b for pin ADDR2 and pin ADDR1 grounded
1100 0011b for pin ADDR2 grounded and pin ADDR1 floating
1100 0101b for pin ADDR2 floating and pin ADDR1 grounded
1100 0111b for pin ADDR2 and pin ADDR1 floating
ACK-s acknowledge generated by the slave
ACK-m acknowledge generated by the master not acknowledge
MSA mode and subaddress byte
Data data byte STOP condition
Table 5. Read register overview TUNER Section 8.1.1 ID Section 8.1.2
Table 6. TUNER - data byte 0h bit allocation
RAGC1 RAGC0 TAS1 TAS0 - - - POR
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.1.2 Read mode: data byte ID
8.2 Write mode
The tuner is controlled by the I2 C-bus. After the IC address the MSA byte contains the
controlof the tuning action via the bits MODE[2:0] and REGC and subaddressing via bits
SA[3:0] (see Figure5).
Table 7. TUNER - data byte 0h bit description and6 RAGC[1:0] RFAGC attenuation indicator
AM mode, PIN diode current on pin IAMAGC:= no AGC= LNA AGC
10=IAGC <1mA
11=IAGC >1mA
FM mode, PIN diode current on pin IFMAGC:=< 0.1 mA= 0.1 mAto 0.5 mA= 0.5 mAto 2.5 mA=> 2.5 mA and4 TAS[1:0] tuning action state; the signal TAS informs about internal control
functions of the tuner action state machine; this way the progress of
tuner actions can be monitored by the microcontroller;
see Figure8to Figure18= no current action= mute started and in progress at DSP= PLL tuning in progress and mute activated at DSP= PLL tuning ready and mute activated at DSPto1 - not used POR power-on reset= normal operation
1=I2 C-bus data is reset to default POR state; POR is reset to
logic 0 after the TEF6730A has been read out and written to via2 C-bus at least once
Table 8. ID - data byte 1h bit allocation - - - - ID2 ID1 ID0
Table 9. ID - data byte 1h bit descriptionto3 - not usedto0 ID[2:0] device type identification 110= TEF6730A
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
The tuner circuit is controlled by the CONTROL register. Any data change in the
CONTROL register has immediate effect and will change the operationof the tuner circuit
accordingly. Transmitted I2 C-bus data is not loaded into the CONTROL register directly
but loaded into a BUFFER register instead. This allows the IC to take care of tuning
actions freeing the microcontroller from cumbersome controls and timings.
Controlled by a state machine, the BUFFER data will be loaded into the CONTROL
registerfor new settings. However,at the same time the CONTROL datais loaded into the
BUFFER register. This register swap action allows a fast return to the previous setting
because the previous data remains available in the BUFFER register (see Figure 6 and
Figure7).
Via MODE several operational modes canbe selectedfor the state machine. MODE offers
all standard tuning actions as well as generic control for flexibility. The state machine
controls the tunerby controlling the internalI2 C-bus data. Action progressis monitoredby
the accompanyingIF DSP via the AFSAMPLE and AFHOLD lines. This way, functions like
tuning mute and weak signal processing can be controlled complementary to the tuner
action.
The state machine operation starts at the end of transmission (P= STOP). In case a
previous action is still active, this is ignored and the new action defined by MODE is
started immediately. When only the address byte is transmitted, no action is started at all
(device presence test).
To minimize the I2 C-bus transmission time, only bytes that include data changes need to
be written. Following the MSA byte the transmission can start at any given data byte
defined by the subaddress (SA) bits.
Furthermore, when writing the buffered range either the current BUFFER data or the
current CONTROL data can be used as default, controlled by the REGC bit: With REGC= 0, any BUFFER data that is not newly written via I2 C-bus remains
unchanged.In general, the BUFFER register will contain the previous tuner setting,so
this becomes default for the new setting. When only the MSA byte is transmitted
defining a tuning MODE with REGC= 0, the tuner will return to its previous settings
(see Figure 6). With REGC=1, the BUFFER registeris loaded with data from the CONTROL register
first. This way, not written BUFFER data equals the CONTROL data. Since the
CONTROL register contains the current tuner setting with REGC= 1, the current
tuner settingis defaultfor the new setting. Whena tuning MODE actionis defined with
REGC= 1, the tuner will keep its current settings (CONTROL= current) for all data
that is not newly written during the transmission (see Figure 7).
After power-on reset, all registers are in their default settings. The control signals for the DSP are setto AFSAMPLE= HIGH and AFHOLD= HIGH (i.e. mute state). Any action
of the state machine will change this setting to a new one as defined by the bits
MODE[2:0].
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
Table 10. Write mode subaddress overview CONTROL 0000 0100b Section 8.2.2 PLLM 0000 1000b Section 8.2.3 PLLL 0111 1110b Section 8.2.4 DAA 0100 0000b Section 8.2.5 AGC 1000 0000b Section 8.2.6 BAND 0010 0000b Section 8.2.7 TEST 0000 0000b Section 8.2.8
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.2.1 Mode and subaddress byte for write
[1] When the write transmission of a state machine command starts during a mute state of the state machine,
the sequences of the state machine start immediately with the actions which follow the mute period in the
standard sequence (see Figure9, Figure11, Figure13, Figure 15 and Figure 17).
[2] Referencesto muteare only usedfor better understanding. Mutingis performedintheIF DSP controlledby
the tuner AFHOLD and AFSAMPLE lines.
[3] In the modes preset and search the AM AGC time constant is set to fast during the period of complete
mute.
[4] The AF update sequence can also be started by pulling the AFHOLD pin LOW. In this case the AF
information should be loaded into the BUFFER before. LOW period for a correct AF update timing:
tLOW >20 μs. Between the end of the I2C-bus transmission and the falling edge of the AFHOLD pulse a
delay of≥20 μs is necessary.
Table 11. MSA - mode and subaddress byte bit allocation
MODE2 MODE1 MODE0 REGC SA3 SA2 SA1 SA0
Table 12. MSA - mode and subaddress byte bit descriptionto5 MODE[2:0] mode; see Table13 REGC register mode= buffer mode or back mode: previous tuning data is default for
new I2 C-bus write (data of the BUFFER register is not changed
before I2 C-bus write); see Figure6= control mode or current mode: current tuning data is default for
new I2 C-bus write (the BUFFER register is loaded with CONTROL
register data before I2 C-bus write); see Figure7to0 SA[3:0] subaddress; write data byte subaddress 0to 15. The subaddress
value is auto-incremented and will revert from SA= 15 to SA= 0. The
auto-increment function cannot be switched off.
Table 13. Tuning action modes[1]
000buffer write BUFFER register, no state machine action, no
swap 0 1 preset tuneto new program with60 ms mute control; swap[3];
see Figure 8 and Figure9 1 0 search tune to new program and stay muted (for release use
end mode); swap[3] ; see Figure 10 and Figure11 1 1 AF update tune to AF program; check AF quality and tune back
to main program; two swap operations[4]
see Figure 12 and Figure13 0 0 jump tune to AF program in minimum time; swap;
see Figure 14 and Figure15 0 1 check tune to AF program and stay muted (for release use
end mode); swap; see Figure 16 and Figure17 1 0 load write CONTROL register via BUFFER; no state
machine action; immediate swap; see Figure 6 and
Figure7 1 1 end end action; release mute; no swap; see Figure18
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.2.2 Write mode: data byte CONTROL
Table 14. CONTROL - data byte 0h bit allocation with default setting
RFGAIN 0 FLAG IFGAIN NBAGC1 NBAGC0 DAASW CFSW 0 00100
Table 15. CONTROL - data byte 0h bit description RFGAIN FM RF gain= standard gain=+6 dB added gain - not used, must be set to logic0 FLAG software port output open-collector= SWPORT pin inactive (high-impedance)= SWPORT pin active (pull-down to ground) IFGAIN IF gain= standard IF gain= increased IF gain (6 dB) and2 NBAGC[1:0] RF AGC start level; setting of narrow band (IF) detection= 700 mV (peak value)= 560 mV (peak value)= 450 mV (peak value)= 350 mV (peak value)
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.2.3 Write mode: data byte PLLM
8.2.4 Write mode: data byte PLLL
8.2.5 Write mode: data byte DAA DAASW antenna DAA mode in FM= standard; DAA output voltage is controlled by Vtune= DAA output voltage is a fixed temperature stable voltage
controlled by the DAA setting (independent of Vtune) CFSW ceramic filter switch= CFSW1 pin active (low-impedance) and CFSW2 pin inactive
(high-impedance)= CFSW2 pin active (low-impedance) and CFSW1 pin inactive
(high-impedance)
Table 15. CONTROL - data byte 0h bit description …continued
Table 16. PLLM - data byte 1h bit allocation with default setting
CPOFF PLL14 PLL13 PLL12 PLL11 PLL10 PLL9 PLL8
Table 17. PLLM - data byte 1h bit description CPOFF charge pump off= standard operation= charge pump deactivatedto0 PLL[14:8] upper byte of PLL divider word
Table 18. PLLL - data byte 2h bit allocation with default settingPLL7 PLL6 PLL5 PLL4 PLL3 PLL2 PLL1 PLL0
Table 19. PLLL - data byte 2h bit descriptionto0 PLL[7:0] lower byte of PLL divider word; PLL[14:0] is the divider ratio N of the
VCO programmable divider; N= 1024to 32767
Table 20. DAA - data byte 3h bit allocation with default settingAGCSW DAA6 DAA5 DAA4 DAA3 DAA2 DAA1 DAA0
01000000
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.2.6 Write mode: data byte AGC
Table 21. DAA - data byte 3h bit description AGCSW RF AGC switch= no drive of unused RF AGC PIN diode (FM PIN diode in mode or AM PIN diode in FM mode)= unused PIN diode supplied with constant currentto0 DAA[6:0] alignment of antenna circuit tuning voltage in FM mode
(0.1Vtuneto 2.0Vtune)
Table 22. AGC - data byte 4h bit allocation with default settingSDAA3 SDAA2 SDAA1 SDAA0 WBAGC1 WBAGC0 KAGC LODX
Table 23. AGC - data byte 4h bit descriptionto4 SDAA[3:0] alignment of second antenna circuit tuning voltage in FM mode
(0.7VDAAOUT1to 1.35VDAAOUT1) and2 WBAGC[1:0] RF AGC start level; setting of wideband (RF) detection; for AM,
see Table 24 and for FM, see Table25 KAGC FM keyed AGC= keyed AGC off= keyed AGC on LODX local switch= standard operation (DX)= forced FM RF AGC attenuation (LOCAL)
Table 24. Setting of RF AGC threshold voltage for AM 0 250 mV 1 200 mV 0 150 mV
1170 mV
Table 25. Setting of RF AGC threshold voltage for FM0024 mV
0117 mV
1012 mV
119 mV
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
8.2.7 Write mode: data byte BANDThe correct charge pump current for each reference frequency is selected automatically,
seeT able 30.
Table 26. BAND - data byte 5h bit allocation with default settingBAND2 BAND1 BAND0 FREF2 FREF1 FREF0 LOINJ FMIFIN
Table 27. BAND - data byte 5h bit descriptionto5 BAND[2:0] see Table28to2 FREF[2:0] PLL reference frequency; see Table29 LOINJ 0= high injection image suppression= low injection image suppression FMIFIN 0= FMIFAGCIN1 input is selected= FMIFAGCIN2 input is selected
Table 28. Decoding of BAND bits0001WB
0012FM
0103FM
0116AM
1008AM
10110 AM
11016 AM
11120 AM
Table 29. Reference frequencies 0 0 100 kHz
00150 kHz
01025 kHz
01120 kHz
10010 kHz 0 1 reserved 1 0 reserved 1 1 reserved
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio[1]X= don’t care.
8.2.7.1 Tuning overviewIf LOINJ=0: .
If LOINJ=1: .
; where M is the divider ratio of the VCO frequency for AM mixer and mixer .
8.2.8 Write mode: data byte TEST[1] The test control byte is for internal use only.
Table 30. Charge pump source[1]000X CP1 100 kHz
001X CP2 50 kHz
010X CP3 25 kHz
0111CP3 20 kHz
0110CP4 20 kHz
100X CP5 10 kHz fRF 10.7 MHz+ () M×ref ---------------------------------------------------------= fRF 10.7 MHz– () M×ref
---------------------------------------------------------=
tuning step fref----------= f VCO mixer---------------=
Table 31. Standard tuner settingsEurope FM and US FM 0 0 1 2 0 0 0 100 kHz0 50 kHz
Japan FM 0 1 0 3 0 0 0 100 kHz1 33.3 kHz
East Europe FM (OIRT FM) 0 1 0 3 0 1 1 20 kHz 1 6.67 kHz FM 0 0 0 1 0 1 0 25 kHz 0 25 kHz
AM MW and LW 1 1 1 200 1 1 20 kHz 0 1 kHz
AM SW 120mto60m 1 1 0 161 0 0 10 kHz 0 0.625 kHz
AM SW 49mto22m 1 0 1 101 0 0 10 kHz 0 1 kHz
AM SW 25mto15m 1 0 0 8 1 0 0 10 kHz 0 1.25 kHz
AM SW 16mto11m 0 1 1 6 1 0 0 10 kHz 0 1.67 kHz
Table 32. TEST - data byte Fh bit allocation with default setting (not buffered)[1] 0 0 0 TEST3 TEST2 TEST1 TEST0
0000
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio Limiting values[1] The maximum voltage must be less than VCCA.
[2] Human body model: Class 2 according to JESD22-A114C.01.
[3] Charge device model: Class 3 according to JESD22-C101C.
[4] Human body model: Class 1C according to JESD22-A114C.01.
10. Thermal characteristics
Table 33. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VCCA analog supply voltage on pins VCC, VCC(PLL), VCC(VCO), VCC(RF),
VCC(IF), FMMIXOUT1, FMMIXOUT2,
AMMIXOUT1 and AMMIXOUT2
−0.3 +10 V
ΔVCCAn voltage difference between
any analog supply pins
−0.3 +0.3 V
VSCL voltage on pin SCL −0.3 +5.5 V
VSDA voltage on pin SDA −0.3 +5.5 V input voltage on pins ADDR1 and ADDR2 [1] −0.3 +5.5 V output voltage on pins AFHOLD and AFSAMPLE −0.3 +5.5 V
on pin SWPORT −0.3 +10 V voltage on any other pin −0.3 VCCA + 0.3V
Ptot total power dissipation - 1100 mW
Tstg storage temperature −55 +150 °C
Tamb ambient temperature soldered exposed die pad
subjective functionality −40 +105 °C
full functionality −40 +85 °C
Vesd electrostatic discharge
voltage
on all pins except pin VCC(VCO) [2] −2000 +2000 V
[3] −500 +500 V
on pin VCC(VCO) [4] −1000 +2000 V
[3] −500 +500 V
Table 34. Thermal characteristicsRth(j-a) thermal resistance from junction to ambient in free air 29.6 K/W
Rth(j-c) thermal resistance from junction to case 17.5 K/W
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
11. Static characteristics
Table 35. Static characteristicsVCCA= 8.5 V; Tamb =25 °C; unless otherwise specified.
Supply voltageVCCA analog supply voltage on pins VCC, VCC(PLL),
VCC(VCO), VCC(RF), VCC(IF),
FMMIXOUT1, FMMIXOUT2,
AMMIXOUT1 and
AMMIXOUT2 8.5 9 V
Current in FM modeICC(RF) RF supply current Tamb= −40°C - 14 - mA
Tamb =25°C - 15 - mA
Tamb =85°C - 16 - mA
ICC(PLL) PLL supply current Tamb= −40°C - 7.9 - mA
Tamb =25°C - 7.6 - mA
Tamb =85°C - 7.2 - mA
ICC(VCO) VCO supply current Tamb= −40°C - 3.8 - mA
Tamb =25°C - 3.6 - mA
Tamb =85°C - 3.5 - mA
ICC supply current Tamb= −40°C - 23 - mA
Tamb =25°C - 21.5 - mA
Tamb =85°C - 19 - mA
ICC(IFAGC) IF AGC supply current Tamb= −40°C - 26 - mA
Tamb =25°C - 26 - mA
Tamb =85°C - 26 - mA
IFMMIXOUT1 current on
pin FMMIXOUT1
Tamb= −40°C - 5.3 - mA
Tamb =25°C - 5.8 - mA
Tamb =85°C - 6.1 - mA
IFMMIXOUT2 current on
pin FMMIXOUT2
Tamb= −40°C - 5.3 - mA
Tamb =25°C - 5.8 - mA
Tamb =85°C - 6.1 - mA
ICC(tot) total supply current - 85.3 - mA
Current in AM modeICC(RF) RF supply current Tamb= −40°C - 39.5 - mA
Tamb =25°C - 39 - mA
Tamb =85°C - 38 - mA
ICC(PLL) PLL supply current Tamb= −40°C - 7.9 - mA
Tamb =25°C - 7.6 - mA
Tamb =85°C - 7.2 - mA
ICC(VCO) VCO supply current Tamb= −40°C - 3.8 - mA
Tamb =25°C - 3.6 - mA
Tamb =85°C - 3.5 - mA
NXP Semiconductors TEF6730A
Front-end for digital-IF car radio
12. Dynamic characteristicsICC supply current Tamb= −40°C - 21.5 - mA
Tamb =25°C - 21 - mA
Tamb =85°C - 20 - mA
ICC(IFAGC) IF AGC supply current Tamb= −40°C - 33 - mA
Tamb =25°C - 32.5 - mA
Tamb =85°C - 32 - mA
IAMMIXOUT1 current on
pin AMMIXOUT1
Tamb= −40 °C- 6 - mA
Tamb =25°C - 5.5 - mA
Tamb =85 °C- 5 - mA
IAMMIXOUT2 current on
pin AMMIXOUT2
Tamb= −40 °C- 6 - mA
Tamb =25°C - 5.5 - mA
Tamb =85 °C- 5 - mA
ICC(tot) total supply current - 114.7 - mA
Table 35. Static characteristics …continuedVCCA= 8.5 V; Tamb =25 °C; unless otherwise specified.
Table 36. Dynamic characteristicsVCCA= 8.5 V; Tamb =25 °C; see Figure 25; all AC values are given in RMS; unless otherwise specified.
Reference frequencyExternal reference frequency, circuit inputs: pins FREF1 and FREF2
fext external frequency - 100 - kHz
C/N carrier-to-noise ratio required from reference
source; fext= 100 kHz;
Δf=10kHz
115 - - dBc/√Hz
Ii(ext)(min)(M) peak minimum
external input current
square wave signal [1]- - 200 μA
Ii(ext)(max)(M) peak maximum
external input current
square wave signal [1] 750 - - μA
Icm(ext) external
common-mode current
from each pin to GND −50 - +50 μA input resistance - 5 10 Ω
Vcm common-mode
voltage
measured between each pinto
GND
1.0 1.2 1.4 V
Tuning system; see Table 28, Table 29, Table 30 and Table31Voltage controlled oscillator
fVCO(min) minimum VCO
frequency
[2]- - 130 MHz
application according to
Figure25
[2]- - 159.9 MHz
fVCO(max) maximum VCO
frequency
[2] 256 - - MHz
C/N carrier-to-noise ratio fVCO= 200 MHz;Δf=10 kHz;
Q=30 98 - dBc/√Hz
