TDA9111 ,LOW-COST I 2 C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITORFEATURES DESCRIPTIONGeneralThe TDA9111 is a monolithic integrated circuit as-sembled in a 32-pin sh ..
TDA9112 ,I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITORSFEATURES Dynamic correction section■ Generates waveforms for dynamic corrections Generallike focus, ..
TDA9112A ,LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR 19 INCH. MULTISYNC CRT MONITORSPIN CONFIGURATIONH/HVSyn 1 32 VDyCorVSyn 2 31 SDAHLckVBk 3 30 SCLHOscF4 29 VccHPLL2C 5 28 BOutCO 6 ..
TDA9115 ,LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR LOW-END CRT MONITORSFEATURES Dynamic correction section■ Vertical dynamic correction waveform output for Generaldynamic ..
TDA9116 ,LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR HIGH-END CRT MONITORSFEATURES Dynamic correction section■ Output with vertical dynamic correction Generalwaveform for dy ..
TDA9144 ,I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor with PALplus helper demodulator
TISP7150F3 , TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP7150F3DR , MEDIUM & HIGH-VOLTAGE TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP7150F3P , TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP7180F3 , TRIPLE BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP7180F3D , MEDIUM & HIGH-VOLTAGE TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP7180F3DR-S , MEDIUM & HIGH-VOLTAGE TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TDA9111
LOW-COST I 2 C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR
Version 4.2
June 2000 1/43
TDA9111LOW-COSTI2C CONTROLLED DEFLECTION PROCESSOR
FOR MULTISYNC MONITOR
FEATURES
General SYNC PROCESSOR (separateor composite) 12V SUPPLY VOLTAGE 8V REFERENCE VOLTAGE HOR. LOCK/UNLOCK OUTPUT HOR.& VERT. LOCK/UNLOCK INDICATION READ/WRITEI2C INTERFACE HORIZONTAL AND VERTICAL MOIRE B+ REGULATOR Internal PWM generator for B+ current mode
step-up converter Switchableto step-down converter-I2C adjustable B+ reference voltage Output pulses synchronized on horizontal
frequency Internal maximum current limitation.
Horizontal Self-adaptative Dual PLL concept 150kHz maximum frequency X-Ray protection inputI2C controls: Horizontal duty-cycle, H-position,
horizontal size amplitude
Vertical Vertical ramp generator 50to 185Hz AGC loop Geometry tracking with VPOS& VAMPI2C controls:
VAMP, VPOS, S-CORR, C-CORR DC breathing compensation
2C Geometry corrections Vertical parabola generator (Pin Cushion- E/W,
Keystone, Corner Correction) Horizontal dynamic phase (Side Pin Balance&
Parallelogram) Horizontal and vertical dynamic focus
(Horizontal Focus Amplitude, Horizontal Focus
Symmetry, Vertical Focus Amplitude)
DESCRIPTIONThe TDA9111isa monolithic integrated circuit as-
sembledina 32-pin shrink dual-in-line plastic
package. ThisIC controlsall the functions related horizontal and vertical deflectionin multimode multi-frequency computer display monitors.
The internal sync processor, combined with the
powerful geometry correction block, makes the
TDA9111 suitablefor very high performance mon-
itors, using few external components.
The horizontal jitter levelis very low.Itis particu-
larly well-suitedto high-end 15” and 17” monitors.
Combined with the ST7275 Microcontroller family,
TDA9206 (Video preamplifier) and STV942x (On-
Screen Display controller), the TDA9111 allows
fully-I2C bus-controlled computer display monitorsbe built witha reduced numberof external com-
ponents.
PIN CONNECTIONS
SHRINK32 (Plastic Package)
ORDER CODE: TDA9111
H/HVIN
VSYNCIN
HMOIRE/HLOCK
PLL2C
PLL1F
HPOSITION
HFOCUSCAP
FOCUS-OUT
HGND
HFLY
HREF
COMP
REGIN
ISENSE
SDA
SCLCC
BOUT
GND
HOUT
XRAY
EWOUT
VOUT
VCAP
VREF
VAGCCAP
VGND
VBREATH+ GND 17
TABLE OF CONTENTS2/43
PIN CONNECTIONS ......................................................................3
QUICK REFERENCE DATA ......................................................................4
BLOCK DIAGRAM ......................................................................5
ABSOLUTE MAXIMUM RATINGS ......................................................................6
THERMAL DATA ......................................................................6
SUPPLY AND REFERENCE VOLTAGES ......................................................................6
I2C READ/WRITE ......................................................................7
SYNC PROCESSOR ......................................................................7
HORIZONTAL SECTION ......................................................................8
VERTICAL SECTION ......................................................................10
DYNAMIC FOCUS SECTION ......................................................................11
GEOMETRY CONTROL SECTION ......................................................................12
MOIRE CANCELLATION SECTION ......................................................................13 SECTION ......................................................................14
TYPICAL OUTPUT WAVEFORMS ......................................................................16
I2C BUS ADDRESS TABLE ......................................................................20
OPERATING DESCRIPTION ......................................................................23 GENERAL CONSIDERATIONS.................. .... .... ........... ........ 23
1.1 Power Supply....... ..... ......... ..... ....... ........... ....... ... 23
1.2 I2C Control....................... ....... ................ ... ....... 23
1.3 Write Mode................................................ ..... ... 23
1.4 Read Mode .... .... ....... ....... .... ......... .... ................ 23
1.5 Sync Processor..... ..... ......... .... ................... ...... .... 23
1.6 Sync Identification Status............................................. 23
1.7 IC status............................... .... .... ........... ........ 24
1.8 Sync Inputs... ....................... ... ............... ........... 24
1.9 Sync Processor Output.............................................. 24 HORIZONTAL PART...... ..... ... ...... .... ................... ...... .... 24
2.1 Internal Input Conditions.. ...... ..... .............. ....... ...... ..... 24
2.2 PLL1............................ ....... ................ ... ....... 25
2.3 PLL2............................ ....... ................ ... ....... 27
2.4 Output Section................ ............ ....... ............. ..... 27
2.5 X-RAY Protection.................... ............ .... ............... 27
2.6 Horizontal and Vertical Dynamic Focus....................... ...... ..... 28
2.7 Horizontal Moiré Output............... ............ .... ............... 29 VERTICAL PART............. ...... ..... .............. ....... ...... ..... 30
3.1 Function...... .................. ..... ... ............. ............. 30
3.2 I2C Control Adjustments............ ..... ....... ........... ....... ... 30
3.3 Vertical Moiré....... ..... ....... ... .... ....... ....... .... ....... ... 30
3.4 Basic Equations ....................... ... ............. ............. 31
3.5 Geometric Corrections.... ...... ..... .............. ....... ...... ..... 31
3.6 E/W .. ........ .... ....... ...... ..... ......... ....... ............. 32
3.7 Dynamic Horizontal Phase Control..... .... ....................... ..... 33 DC/DC CONVERTER PART............................................... 33
4.1 Step-up Mode.......................... ....... .... ................ 33
4.2 Step-down Mode................... .... ....................... ..... 33
4.3 Step-up and Step-down Mode Comparison........... ....... ............. 33
INTERNAL SCHEMATICS ......................................................................35
PACKAGE MECHANICAL DATA ......................................................................42
TDA91113/43
PIN CONNECTIONS
Pin Name Function H/HVIN TTL compatible Horizontal sync Input (separateor composite) VSYNCIN TTL compatible Vertical sync Input (for separated H&V) HMOIRE/
HLOCK
Horizontal Moiré Output(tobe connectedto PLL2C througha resistor divider), HLock
Output PLL2C Second PLL Loop Filter C0 Horizontal Oscillator Capacitor R0 Horizontal Oscillator Resistor PLL1F First PLL Loop Filter HPOSITION Horizontal Position Filter (capacitortobe connectedto HGND) HFOCUS-
CAP Horizontal Dynamic Focus Oscillator Capacitor FOCUS OUT Mixed Horizontal and Vertical Dynamic Focus Output HGND Horizontal Section Ground HFLY Horizontal Flyback Input (positive polarity) HREF Horizontal Section Reference Voltage(tobe filtered) COMP B+ Error Amplifier Outputfor frequency compensation and gain setting REGIN Feedback InputofB+ control loop ISENSE Sensingof externalB+ switching transistor current,or switchfor step-down converter B+GND Ground (relatedtoB+ reference) VBREATH V Breathing Input Control (compensationof vertical amplitude against EHV variation) VGND Vertical Section Ground VAGCCAP Memory Capacitorfor Automatic Gain Controlin Vertical Ramp Generator VREF Vertical Section Reference Voltage(tobe filtered) VCAP Vertical Sawtooth Generator Capacitor VOUT Vertical Ramp Output (with frequency-independent amplitude andSorC Corrections any).Itis mixed with vertical position voltage and vertical moiré. EWOUT Pin Cushion (E/W) Correction Parabola Output XRAY X-RAY protection input (with internal latch function) HOUT Horizontal Drive Output (open collector) GND General Ground BOUT B+ PWM Regulator Output VCC Supply Voltage(12V typ) (referencedto Pin 27) SCL I2C Clock Input SDA I2C Data Input 5V 5V Supply Voltage
TDA91114/43
QUICK REFERENCE DATA
Parameter Value UnitAny polarityonH Sync&V Sync inputs YES
TTLor composite Syncs YES
Syncon Green NO
Horizontal Frequency 15to 150 kHz
Horizontal Autosync Range (for givenR0 and C0. Canbe easily increasedby application) 1to4.5f0
Controlof free-running frequency NO
Frequency Generatorfor Burn-in NO
Controlof H-Position throughI2C YES
Controlfor H-Duty Cycle throughI2 C30to65 %
PLL1 Inhibition Possibility NO
Outputfor Horizontal Lock/Unlock YES
Dual Polarity H-Drive Outputs NO
Vertical Frequency 35to 200 Hz
Vertical Autosync Range (for 150nFon Pin22 and 470nFon Pin 20) 50to 185 Hz
Vertical S-Correction (adaptedto normalor superflat tube), controlled throughI2C YES
Vertical C-Correction, controlled throughI2C YES
Controlof Vertical Amplitude throughI2C YES
Controlof Vertical Position throughI2C YES
Inputfor Vertical Amplitude compensation versus EHV YES
E/W Correction Output (also knownas Pin Cushion Output) YES
Horizontal Size Adjustment throughI2C controlof E/W OutputDC level YES
Controlof E/W (Pincushion) Adjustment throughI2C YES
Controlof Keystone (Trapezoïd) Adjustment throughI2C YES
Controlof Corner Adjustment throughI2C YES
Fully integrated Dynamic Horizontal Phase Control YES
Controlof Side Pin Balance throughI2C YES
Controlof Parallelogram throughI2C YES
H/V composite Dynamic Focus Output YES
Controlof Horizontal Dynamic Focus Amplitude throughI2C YES
Controlof Horizontal Dynamic Focus Symmetry throughI2C YES
Controlof Vertical Dynamic Focus Amplitude throughI2C YES
Trackingof Geometric Corrections andof Vertical focus with Vertical Amplitude and Position YES
Controlof Horizontal and Vertical Moiré cancellations throughI2C YES
Optimisationof HMoiré frequency throughI2C YES Regulation, adjustable throughI2C YES
Stand-by function, disablingH andV scanning andB+ YES
X-Ray protection, disablingH scanning andB+ YES
Blanking Outputs NO
FastI2C Read/Write 400 kHz2C indicationofthe presenceof Syncs (biased from5V alone) YES2C indicationofthe polarity and Typeof Syncs YES2C indicationof Lock/Unlock,for both Horizontal and Vertical sections YES
TDA91115/43
BLOCK DIAGRAMHSize
bits
PLL1F
POSITION
HFLY
PLL2C
HOUT
Phase/Frequency
Comparator
H-Phase
(7bits)
VCO
Phase
Comparator
Phase
Shifter
H-Duty
(7bits)
Hout
Buffer
Safety
Processor
Controller
SPin
bal
7bits
7bits
Lock/Unlock
Identification
Sync
Processor
Sync
Input
Select
(1bit)
VSYNC
HFLY
Horizontal
Moire
Generator
bits+ON/OFF
+Frequency
Geometry
Tracking
VDFAMP
7bits
Internal
reference
(7bits)
Amp,Symmetry2x7bits
Corner7bits
E/Wpcc
7bits
Keyst.
bits
Vertical
Moire
Cancel
7bits+ON/OFF
TDA9111VSYNC
VPOS
7bits
VAMP7bits
bits
bits
Vertical
Oscillator
Ramp
Generator
and
Correction
Interface
ref
ref2925 28
HGNDVGND VCCXRAYB+OUTISENSECOMPREGINGND
FOCUS HFOCUS- EWOUT
OUT
VBREATH
AGCCAP
CAP13322730312 3
H/HVIN
SYNCIN
HMOIRE
/HLOCK
SDASCL
GND
HREF VREF
CAP
Parallelogram
TDA91116/43
ABSOLUTE MAXIMUM RA TINGS
THERMAL DATA
SUPPLY AND REFERENCE VOLTAGES
Electrical Characteristics (VCC= 12V, Tamb =25°C
Symbol Parameter Value UnitVCC Supply Voltage (Pin 29) 13.5 VDD Supply Voltage (Pin 32) 5.7 V
VIN
Max Voltageon Pin4
Pin9
Pin5
Pins6,7,8, 14, 15,16,20,22
Pins3, 10,18, 23,24, 25,26,28
Pins1,2
Pins 30,31
VCC
VDD
VESD
ESD susceptibility Human Body Model, 100pF Discharge
through 1.5kΩ
EIAJ Norm, 200pF Discharge through0Ω
Tstg Storage Temperature -40, +150 °C Junction Temperature +150 °C
Toper Operating Temperature 0, +70 °C
Symbol Parameter Value UnitRth(j-a) Max. Junction-Ambient Thermal Resistance 65 °C/W
Symbol Parameter Test Conditions Min. Typ. Max. UnitsVCC Supply Voltage Pin29 10.8 12 13.2 V
VDD Supply Voltage Pin32 4.5 5 5.5 V
ICC Supply Current Pin29 50 mA
IDD Supply Current Pin32 5 mA
VREF-H Horizontal Reference Voltage Pin13,I= -2mA 7.6 8.2 8.8 V REF-V Vertical Reference Voltage Pin21,I= -2mA 7.6 8.2 8.8 V
IREF-H Max. Sourced Currenton VREF-H Pin13 5 mA
IREF-V Max. Sourced Currenton VREF-V Pin21 5 mA
TDA91117/43
2C READ/WRITE
Electrical Characteristics (VDD= 5V,T amb =25°C)
Note:1 See alsoI2C Sub Address Table.
SYNC PROCESSOR
Operating Conditions (VDD= 5V, VCC= 12V,T amb =25°C)
Electrical Characteristics(VDD= 5V,VCC= 12V,T amb =25°C)
Note:2 THis the horizontal period.
Symbol Parameter Test Conditions Min. Typ. Max. Units2C PROCESSOR(1)Fscl Maximum Clock Frequency Pin30 400 kHz
Tlow Low periodof the SCL Clock Pin30 1.3 μs
Thigh High periodof the SCL Clock Pin30 0.6 μs
Vinth SDA and SCL Input Threshold Pins 30,31 2.2 V
VACK Acknowledged Output Voltageon SDA
input with 3mA Pin31 0.4 V2C leak Leakage current into SDA and SCL with logic supply
VDD =0
Pins 30,31=5V μA
Symbol Parameter Test Conditions Min. Typ. Max. UnitsHSVR Voltageon H/HVIN Input Pin1 0 5 V
MinD Minimum Horizontal Input Pulses Dura-
tion Pin1 0.7 μs
Mduty Maximum Horizontal Input Signal Duty
Cycle Pin1 25 %
VSVR Voltageon VSYNCIN Pin2 0 5 V
VSW Minimum Vertical Sync Pulse Width Pin2 5 μs
VSmD Maximum Vertical Sync Input Duty Cycle Pin2 15 %
VextM Maximum Vertical Sync Widthon TTLH/
Vcomposite Pin1 750 μs
Symbol Parameter Test Conditions Min. Typ. Max. UnitsVINTH Horizontal and Vertical Input Logic Level
(Pins1,2)
High Level
Low Level
RIN Horizontal and Vertical Pull-Up Resistor Pins1,2 250 kΩ
VoutT Extracted Vsync Integration Time(%of
TH)on H/VComposite(2) C0= 820pF 26 35 %
TDA91118/43
HORIZONTAL SECTION
Operating Conditions
Electrical Characteristics (VCC= 12V, Tamb =25°C)
Symbol Parameter Test Conditions Min. Typ. Max. Units
VCOI0max Max Current from Pin6 Pin6 1.5 mA
F(max.) Maximum Oscillator Frequency 150 kHz
OUTPUT SECTIONI12m Maximum Input Peak Current Pin12 5 mA
HOI Horizontal Drive Output Maximum Cur-
rent Pin26, Sunk current 30 mA
Symbol Parameter Test Conditions Min. Typ. Max. Units
1st PLL SECTIONHpoIT Delay Timefor detecting polarity
change(3) Pin1 0.75 ms
Vvco VCO Control Voltage (Pin7)
VREF-H= 8.2V =f0
fH=fH (Max.)
Vcog VCO Gain (Pin7) R0= 6.49kΩ,= 820pF Tbd 15.9 Tbd kHz/V
Hph Horizontal Phase Adjustment(4) %of Horizontal
Period ±10 %
Vbmi
Vbtyp
Vbmax
Horizontal Phase Setting Value (Pin8)(4)
Minimum Value
Typical Value
Maximum Value
Sub-Address01
Byte x1111111
Byte x1000000
Byte x0000000
IPII1U
IPII1L PLL1 Filter Charge Current PLL1is Unlocked
PLL1is Locked
±140 Free Running Frequency R0= 6.49kΩ,C0= 820pF Tbd 22.8 Tbd kHz
dfo/dT Free Running Frequency Thermal Drift(5) Not including external
componant drift -150 ppm/C PLL1 Capture Range fH(Min.)
fH(Max.)(6) fo+0.5
4.5fo
kHz
kHz
HUnlock DC level pin3 when PLL1is
unlocked
Sub-address02
1xxx xxxx
0000 0000
0111 1111(7)
2.75 3
TDA91119/43
Note:3 This delayis necessaryto avoida wrong detectionof polarity changeinthe caseofa composite sync. See Figure10for explanationof reference phase. These parameters arenot testedon each unit. They are measured during our internal qualification. A larger range maybe obtainedby application. Whenat 0xxx xxxx, (HMoiré/HLock not selected), Pin3isa DAC with 0.3...2.75V range. Whenat 1xxx xxxx
(HMoiré/HLock selected) and PLL1is locked, Pin3 provides the waveformfor HMoiré. See also Moiré
section. Hjit=106 x(Standard deviation/Horizontal period). Duty Cycleis the ratio between the output transistor OFF time andthe period. The scanning transistoris
controlled OFF when the output transistoris OFF. Initial Conditionfor Safe Start Up.
2nd PLL SECTION AND HORIZONTAL OUTPUT SECTIONFBth Flyback Input Threshold Voltage (Pin12) 0.65 0.75 V
Hjit Horizontal Jitter(8) At 31.4kHz 70 ppm
HDmin
HDmax
Horizontal Drive Output Duty-Cycle (Pin
26)(9)
Sub-Address00
Byte x1111111
Byte x0000000 (10) 30
XRAYth X-RAY Protection Input Threshold Volt-
age, Pin 25, (see fig.14) 7.6 8.2 8.8 V
Vphi2 Internal Clamping Levelson 2nd PLL
Loop Filter (Pin4)
Low Level
High Level
VSCinh
Inhibition threshold (The condition VCC<
VSCinh willstop H-Out, V-Out, B-Out and
reset X-RAY)
Pin29 7.5 V
HDvd Horizontal Drive Output (low level) Pin 26, IOUT= 30mA 0.4 V
Symbol Parameter Test Conditions Min. Typ. Max. Units
TDA911110/43
VERTICAL SECTION
Operating Conditions
Electrical Characteristics (VCC= 12V,T amb =25°C)
Note: 11 These parameters arenot testedon each unit. They are measured during our internal qualification procedure.
Note: 12 Set Register07at Byte 0xxxxxxx(S correction inhibited) and Register08at Byte 0xxxxxxx(C correction
inhibited),to obtaina vertical sawtooth with linear shape.
Note: 13 Thisis the frequency rangefor which the vertical oscillator will automatically synchronize, usinga single
capacitor valueon Pin22 and Pin 20, and witha constant ramp amplitude.
Note: 14 Whennot used, the DC breathing controlpin mustbe connectedto 12V.
Symbol Parameter Test Conditions Min. Typ. Max. UnitsRLOAD Minimum Loadfor less than 1% Vertical
Amplitude Drift Pin20 65 MΩ
Symbol Parameter Test Conditions Min. Typ. Max. UnitsVRB Voltageat Ramp Bottom Point Pin22 2.1 V
VRT Voltageat Ramp Top Point (with Sync) Pin22 5.1 V
VRTF Voltageat Ramp Top Point (without
Sync) Pin22 VRT-
0.1 V
VSTD Vertical Sawtooth Discharge Time Pin22, C22= 150nF 70 μs
VFRF Vertical Free Running Frequency (12) Pin22,C22= 150nF 100 Hz
ASFR AUTO-SYNC Frequency (13) C22= 150nF ±5% 50 185 Hz
RAFD Ramp Amplitude Drift Versus Frequency Maximum Vertical Amplitude (11) C22= 150nF
50Hz
Rlin Ramp Linearityon Pin22(12) 2.5V< V27< 4.5V 0.5 %
VPOS Vertical Position Adjustment Voltage (Pin- VOUT mean value)
Sub Address06
Byte 00000000
Byte 01000000
Byte 01111111 Tbd
Tbd V
VOR Vertical Output Voltage
(peak-to-peakonPin 23)
Sub Address05
Byte 10000000
Byte 11000000
Byte 11111111 Tbd
Tbd V
VOI Vertical Output Maximum Current
(Pin 23) ±5mA
dVS
Max Vertical S-Correction Amplitude (TVthe vertical period)
(0xxxxxxx inhibits S-CORR
11111111 gives max S-CORR)
Sub Address07
Byte 11111111
ΔV/VPPat TV/4
ΔV/VPPat 3TV/4
+3.5
Ccorr Vertical C-Corr Amplitude
(0xxxxxxx inhibits C-CORR)
Sub Address08
ΔV/VPPat TV/2
Byte 10000000
Byte 11000000
Byte 11111111
BRRANG DC Breathing Control Range (14) V18 112 V
BRADj Vertical Output Variation versus DC
Breathing Control (Pin 23)
V18 >VREF-V
1V%/V
%/V
TDA9111
11/43
DYNAMIC FOCUS SECTION
Electrical Characteristics (VCC= 12V,T amb =25°C)
Note: 15S andC correction are inhibitedto obtaina linear vertical sawtooth.
Symbol Parameter Test Conditions Min. Typ. Max. Units
HORIZONTAL DYNAMIC FOCUS FUNCTION (seeFigure15on page 29)
HDFst
Horizontal Dynamic Focus Sawtooth
Minimum Level
Maximum Level
Pin9, capacitoron HFO-
CUSCAP and= 820pF,TH =20μs 2.2
HDFdis Horizontal Dynamic Focus Sawtooth Dis-
charge Width Triggeredby HDFstart 400 ns
HDFstart
Internal Phase Advance versus HFLY
middle
(Independentof frequency) μs
HDFDC Bottom DC Output Level RLOAD= 10kΩ,
Pin10 2.1 V
TDFHD DC Output Voltage Thermal Drift(11) 200 ppm/C
HDFamp
Horizontal Dynamic Focus
Amplitude
Max Byte
Typ Byte
Max Byte
Sub-Address 03,
Pin 10,fH= 50kHz,
Symmetric Wave Form
x1111111
x1000000
x0000000
VPP
VPP
VPP
HDFKeyst
Horizontal Dynamic FocusSymmetry
(For time reference, see Figure15)
Advancefor Byte
Delayfor Byte
Subaddress04
x1111111 (decimal 127)
x0000000 (decimal0)
VERTICAL DYNAMIC FOCUS FUNCTION (see Figure1)
AMPVDF
Vertical Dynamic Focus Parabola (added horizontal) Amplitude with VAMP and
VPOS Typical
Sub-Address0F
Min Byte x0000000
Typ Byte x1000000
Max Byte x1111111
VPPPP
VPP
VDFAMP
Parabola Amplitude Functionof VAMP
(tracking between VAMP and VDF) with
VPOS Typ. (seeFigure1 onpage15 and
(15))
Sub-Address05
Byte x0000000
Byte x1000000
Byte x1111111
1.5PP
VPP
VPP
VHDFKeyt
Parabola Asymmetry Functionof VPOS
Control (tracking between VPOS and
VDF) with VAMP Max.
B/A Ratio
A/B Ratio
Sub-Address06
Byte x0000000
Byte x1111111
0.52
TDA9111
12/43
GEOMETRY CONTROL SECTION
Electrical Characteristics (VCC= 12V, Tamb =25°C)
Symbol Parameter Test Conditions Min. Typ. Max. Units
SYMMETRIC CONTROL THROUGH E/W OUTPUT (see Figure2on page15 and Figure4on page 15)
VEWM Maximum E/W Output Voltage Pin24 6.5 V
VEWm Minimum E/W Output Voltage Pin24 1.8 V
EWDC
For controlof Horizontal size. DC Output
Voltage with E/W, corner and Keystone
inhibited
Pin24, see Figure2
Subaddress11
Byte x0000000
Byte x1000000
Byte x1111111
TDEWDC DC Output Voltage Thermal Drift See (16) 100 ppm/C
EWpara
Parabola Amplitude with Max. VAMP,
Typ. VPOS, Keystone and Corner inhibit-
Subaddress0A
Byte 11111111
Byte 11000000
Byte 10000000
VPPPP
VPP
EWtrack
Parabola Amplitude Functionof VAMP
Control (tracking between VAMP andE/ with Typ. VPOS, Typ. E/WAmplitude,
corner and Keystone inhibited (17)
Subaddress05
Byte 10000000
Byte 11000000
Byte 11111111
VPP
VPP
VPP
KeyAdj
Keystone Adjustment Capability with
Typ. VPOS, E/W inhibited, Corner inhibit- andMax. Vert. Amplitude (see(17) and
Figure4)
Subaddress09
Byte 10000000
Byte 11111111
VPP
VPP Corner
Corner Adjustment Capability with Typ.
VPOS, E/W inhibited, Keystone inhibited
and Max. Vertical Amplitude
Subaddress10
Byte 11111111
Byte 11000000
Byte 10000000
+1.25
−1.25
VPPPP
VPP
KeyTrack
Intrinsic Keystone Functionof VPOS
Control (tracking between VPOS andE/ with Max. E/W Amplitude and Max.
Vertical Amplitude, Corner inhibited
B/A Ratio
A/B Ratio
Subaddress06
Byte 00000000
Byte 01111111
ASYMMETRIC CONTROL THROUGH INTERNAL DYNAMIC HORIZONTAL PHASE MODULATION (see Figure3)
SPBpara
Side Pin Balance Parabola Amplitude
(Figure3) with Max. VAMP, Typ. VPOS
and Parallelogram inhibited(17&18)
Subaddress0D
Byte 11111111
Byte 10000000
+2.8
%TH
%TH
SPBtrack
Side Pin Balance Parabola Amplitude
functionof VAMP Control (tracking be-
tween VAMP and SPB) with Max. SPB,
Typ. VPOS and Parallelogram inhibited
(17&18)
Subaddress05
Byte 10000000
Byte 11000000
Byte 11111111
%THH
%TH
ParAdj
Parallelogram Adjustment Capability with
Max. VAMP, Typ. VPOS and SPB inhibit-(17&18)
Subaddress0E
Byte 11111111
Byte 11000000
+2.8
-2.8H
%TH
Partrack
Intrinsic Parallelogram Function ofVPOS
Control (tracking between VPOS and
DHPC) with Max. VAMP, Max. SPB and
Parallelogram inhibited (17&18)
B/A Ratio
A/B Ratio
Subaddress06
Byte x0000000
Byte x1111111
0.52
TDA9111
13/43
Note: 16 These parameters arenot testedon each unit. They are measured duringour internal qualification procedure.
Note: 17 With Register07at Byte 0xxxxxxx(S correction inhibited) and Register08at Byte 0xxxxxxx(C correction
inhibited), the sawtooth hasa linear shape.
MOIRE CANCELLATION SECTION
Electrical Characteristics (VCC= 12V, Tamb =25°C)
Note: 18 THis the horizontal period.
Symbol Parameter Test Conditions Min. Typ. Max. Units
HORIZONTAL AND VERTICAL MOIRE
RMOIRE Minimum Output Resistorto GND Pin3 4.7 kΩ
DacOut DC Voltagepin3
DAC configuration
RMOIRE =4.7kΩ
sub-address02
Byte 00000000
Byte 01000000
Byte 01111111
2.75 3
HMOIRE
Moiré pulse (See also Hunlockin1st PLL
section) Frequency: Locked MOIRE =4.7kΩ
Sub-address02
Byte 10000000
Byte 11000000
Byte 11111111
2.2PP
VPP
VPP
THMOIRE HMoiré pulse period pin3 Frequency: Locked
Sub-addressII:
0xxx xxxx
1xxx xxxx
4.TH
2.TH
VMOIRE Vertical Moiré
(measuredon VOUT: Pin 23)
Sub-address0C
Byte 11111111 6 mV
TDA9111
14/43 SECTION
Operating Conditions
Electrical Characteristics (VCC= 12V,T amb =25°C)
Note: 19 These parametersare not testedon each unit. They are measured during our internal qualification procedure
which includes characterizationon batches coming from cornersof our process and also temperature
characterization.
Note: 20To make soft start possible, 0.5mA are sunk whenB+is disabled.
Note: 21 The external power transistoris OFFduring 400nsofthe HFOCUSCAP discharge
Symbol Parameter Test Conditions Min. Typ. Max. Units
FeedRes Minimum Feedback Resistor Resistor between Pins15
and14 5kΩ
Symbol Parameter Test Conditions Min. Typ. Max. Units
OLG Error Amplifier Open Loop Gain At low frequency (19) 85 dB
UGBW Unity Gain Bandwidth See (19) 6 MHz
IRI Feedback Input Bias Current Current sourced byPin15
(PNP base) 0.2 μA
EAOI Error Amplifier Output Current
Current sourcedby Pin14
Current sunkby
Pin14 (20) 2
1.4 mA
CSG Current Sense Input Voltage Gain Pin16 3
MCEth Max Current SenseInput Threshold Volt-
age Pin16 1.3 V
ISI Current Sense Input Bias Current Current sunkby Pin16
(PNP base) 1 μA
Tonmax Maximum ONTimeofthe external power
transistorof horizontal period,o= 27kHz) (21) 100 %
B+OSV B+Output Saturation Voltage V28 withI28= 10mA 0.25 V
IVREF Internal Reference Voltage error amp(+)
input Subaddress OB:
Byte 1000000
VREFADJ Internal Reference Voltage Adjustment
Range
Byte 01111111
Byte 00000000
+20
PWMSEL
Thresholdfor step-up/step-down selec-
tion (step-up configurationif V16 SEL)
Pin16 6 V
tFB+ Fall Time Pin28 100 ns
TDA9111
15/43
Figure1. Vertical Dynamic Focus Function
Figure2. E/W Output
Figure3. Dynamic Horizontal Phase Control
Figure4. Keystone Effecton E/W Output (PCC Inhibited)
TDA9111
16/43
TYPICAL OUTPUT WAVEFORMS
Function Sub
Address Pin Byte Specification Effecton Screen
Vertical Size 05 23
Vertical
Position Control 23
00000000 VOUTDC= 3.2V
01000000 VOUTDC= 3.6V
01111111 VOUTDC= 4.0V
Vertical
Linearity 23
0xxxxxxx:
Inhibited
11111111ΔV
VPP 3.5%
VPP
TDA9111
17/43
Vertical
Linearity 23
0xxxxxxx:
Inhibited
Horizontal
Size 11 24
x1111111
x0000000
Horizontal
Dynamic
Focus with:
Amplitude 10
X000 0000—
X111 1111---
Horizontal
Dynamic
Focus with:
Symmetry 10 X000 0000—
X111 1111---
Function Sub
Address Pin Byte Specification Effecton ScreenPP
VPP =-3%
VPP
VPP =+3%
4.2V
TDA9111
18/43
Keystone
(Trapezoid)
Control 24
(E/W+ Corner Inhibited)
E/W
(Pin
Cushion)
Control 24
(Keystone+ Corner Inhibited)
Corner
Control 10 24
(Keystone+ E/W Inhibited)
Parallel-
ogram
Control
(SPB Inhibited)
Side Pin
Balance
Control
(Parallelogram Inhibited)
Function Sub
Address Pin Byte Specification Effecton Screen
0.4V EWDC
0.4V EWDC
EWDC 0V
EWDC
1.4V
1.25V
EWDC
EWDC
1.25V
Internal
2.8%TH
2.8%TH
2.8%TH
2.8%TH
TDA9111
19/43
Vertical
Dynamic
Focus with
Horizontal 10
X111 1111
X000 0000
Function Sub
Address Pin Byte Specification Effecton Screen
2.1V
2.1V 0V
TDA9111
20/432C BUS ADDRESS TABLE
Slave Address (8C): Write Mode
Sub Address Definition
Slave Address (8D): Read Mode: No sub address needed. D7 D6 D5 D4 D3 D2 D1 0 0 0 0 0000 Horizontal Drive Selection/Horizontal Duty Cycle 0 0 0 0 0001 X-ray Reset/Horizontal Position 0 0 0 0 0010 Horizontal Moiré/H Lock 0 0 0 0 0011 Sync. Priority/Horizontal Focus Amplitude 0 0 0 0 0100 Refresh/Horizontal Focus Symmetry 0 0 0 0 0101 Vertical Ramp Amplitude 0 0 0 0 0110 Vertical Position Adjustment 0 0 0 0 0111 S Correction 0 0 0 0 1000 C Correction 0 0 0 0 1001 E/W Keystone 0 0 0 0 1010 E/W Amplitude 0 0 0 0 1011 B+ Reference Adjustment 0 0 0 0 1000 Vertical Moiré 0 0 0 0 1001 Side Pin Balance 0 0 0 0 1010 Parallelogram 0 0 0 0 1011 Vertical Dynamic Focus Amplitude 0 0 0 1 0000 E/W Corner 0 0 0 1 0001 H. Moiré Frequency/Horizontal Size Amplitude
TDA9111
21/432C BUS ADDRESS TABLE (continued) D7 D6 D5 D4 D3 D2 D1
WRITE MODE
HDriveoff
[1],on
Horizontal Duty Cycle
[0] [0] [0] [0] [0] [0] [0]
Xray reset
[0]
Horizontal Phase Adjustment
[1] [0] [0] [0] [0] [0] [0]
HMoiré/HLockon
[0],off
Horizontal Moiré Amplitude
[0] [0] [0] [0] [0] [0] [0]
Sync Comp
[1], Sep
Horizontal Focus Amplitude
[1] [0] [0] [0] [0] [0] [0]
Detect
Refresh
[0],off
Horizontal Focus Symmetry
[1] [0] [0] [0] [0] [0] [0]
Vrampoff
[1],on
Vertical Ramp Amplitude Adjustment
[1] [0] [0] [0] [0] [0] [0]
TestVon
[0],off
Vertical Position Adjustment
[1] [0] [0] [0] [0] [0] [0] Selecton
[0] Correction
[1] [0] [0] [0] [0] [0] [0] Selecton
[0] Correction
[1] [0] [0] [0] [0] [0] [0]
E/W Keyoff
[1]
E/W Keystone
[1] [0] [0] [0] [0] [0] [0]
E/W Seloff
[1]
E/W Amplitude
[1] [0] [0] [0] [0] [0] [0]
TestHon
[0],off+ Reference Adjustment
[1] [0] [0] [0] [0] [0] [0] Moiréon
[0]
Vertical Moiré Amplitude
[0] [0] [0] [0] [0] [0] [0]
SPB Seloff
[1]
Side Pin Balance
[1] [0] [0] [0] [0] [0] [0]
Parallelooff
[1]
Parallelogram
[1] [0] [0] [0] [0] [0] [0]
TDA9111
22/43
[x] initial value
Datais transferred with vertical sawtooth retrace. recommend setting the unspecified bitsto[0]in orderto ensure compatibility with future devices.
Eq. Pulse ignoreTH/2
[0], acceptall
Vertical Dynamic Focus Amplitude
[1] [0] [0] [0] [0] [0] [0]
Corner Selon
[0],off
E/W Corner
[1] [0] [0] [0] [0] [0] [0] Moiré Fre-
quency F/2
[0] F/4
Horizontal Size Amplitude
[1] [0] [0] [0] [0] [0] [0]
READ MODE
Hlockon
[1],no
Vlockon
[1],no
Xrayon
[0],off
Polarity Detection Sync Detection
H/Vpol
[1], negativepol
[1], negative
Vextdet
[0],nodet
H/Vdet
[0],no detdet
[0],nodet D7 D6 D5 D4 D3 D2 D1
