TDA7420 Fast Delivery |IC PHOENIX CO.,LIMITED

TDA7420 ,MULTIFUNCTION AUDIO PROCESSORTDA7420®MULTIFUNCTION AUDIO PROCESSORCASSETTE PREAMPLIFIER:FORWARD/REVERSE INPUTS GROUNDCOMPATIBLEI ..
TDA7421 ,AM/FM TUNER FOR CAR RADIO AND HI-FI APPLICATIONSABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitTamb Operating Temperature Range -40 to 85 °CTst ..
TDA7421N ,AM/FM TUNER FOR CAR RADIO AND HI-FI APPLICATIONSAPPLICATIONS■ AM DOUBLE CONVERSION ARCHITECTURETQFP64■ AM/FM STATION DETECTOR AND DIGITAL ORDERING ..
TDA7427AD ,AM-FM RADIO FREQUENCY SINTHESIZER AND IF COUNTERELECTRICAL CHARACTERISTICS (Tamb = 25°C; VDD1 = 5V; VDD2 = 10V; fOSC = 4MHz; unless other-wise spec ..
TDA7427AD1 ,AM-FM RADIO FREQUENCY SINTHESIZER AND IF COUNTERABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Supply Voltage - 0.3 to + 7 VDD1V Supply Volta ..
TDA7427D ,AM-FM RADIO FREQUENCY SYNTHESIZER AND IF COUNTERTDA7427®AM-FM RADIO FREQUENCY SYNTHESIZERAND IF COUNTERON-CHIP REFERENCE OSCILLATOR ANDPROGRAMMABLE ..
THN6501S , NPN SiGe RF TRANSISTOR
THS0842 ,8-Bit, 40 MSPS ADC Dual Ch. (Config.), Dual Simultaneous S&H, Low Power, PowerDownblock diagramAVDDDRV DVDD DDCOUTCLK Timing CircuitryCOUTI +Sample& HoldI –DA(7–0)3-State8 BITBUSMUX ..
THS0842IPFB ,8-Bit, 40 MSPS ADC Dual Ch. (Config.), Dual Simultaneous S&H, Low Power, PowerDownTHS0842 DUAL-INPUT, 8-BIT, 40 MSPS LOW-POWER ANALOG-TO-DIGITAL CONVERTERWITH SINGLE OR DUAL PARALLE ..
THS10064 ,10-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP Interface, Integ. 16x FIFO, Ch. AutoScan, Low PowerFEATURES DESCRIPTION* High-Speed 6 MSPS ADCThe THS10064 is a CMOS, low-power, 10-bit, 6 MSPS* 4 Ana ..
THS10064CDA ,10-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP Interface, Integ. 16x FIFO, Ch. AutoScan, Low PowerMAXIMUM RATINGS(1)over operating free-air temperature range unless otherwise notedTHS10064DGND to D ..
THS10064CDAR ,10-Bit, 6 MSPS ADC Quad Ch. (Config.), DSP/uP Interface, Integ. 16x FIFO, Ch. AutoScan, Low PowerELECTRICAL CHARACTERISTICS over recommended operating conditions, AV = 5 V, DV = BV = 3.3 V, f = ..

TDA7420
MULTIFUNCTION AUDIO PROCESSOR
TDA7420
MULTIFUNCTION AUDIO PROCESSOR
CASSETTE PREAMPLIFIER:
FORWARD/REVERSE INPUTS GROUND
COMPATIBLE
INTERNAL SWITCHES FOR EQUALIZATION
INTERNAL ADJUSTMENT FOR TRAKING
INTERNAL ADJUSTMENT FOR OUTPUT
AMS:
INPUT GAIN CONTROL
ADJUSTABLE GAIN VERSUS FREQUENCY
AUDIOPROCESSOR:
INPUTS: 1 FULLY DIFFERENTIAL, 1 DIFFER-
ENTIAL, 1 STEREO AND 1 MONO
INPUT GAIN FROM 0 TO 15dB (1dB STEP)
VOLUME CONTROL FROM +16 TO -63dB
(1dB STEP)
BASS AND TREBLE CONTROL FROM -18
TO 18dB (1dB STEP)
DIRECT MUTE, SOFT MUTE AND RADIO
MUTE
FOUR INDEPENDENT OUTPUT STAGES:
- ATTENUATION CONTROL FROM
0 TO -79dB (1dB STEP)
- BEEP CONTROL (ON/OFF, FRONT/REAR)
STEREO DECODER:
ROLL-OFF ADJUSTMENT
SELECTABLE DEEMPHASIS
19KHz CANCELLATION
HIGH CUT CONTROL
STEREO BLEND
NOISE BLANKER
AUTOMATIC THRESHOLD CONTROL AND
PROGRAMMABLE TRIGGER THRESHOLD
INTEGRATED HIGH PASS FILTER
PACKAGE: TQFP64 (14x14)
DESCRIPTION
The TDA7420 I2 C bus controlled multifunction
audio processor contains all signal processing
blocks of a high performance car radio, including
audioprocessor, stereodecoder, noise blanker,
different mute functions, cassette preamplifier and
AMS function.
The use of BICMOS technology allows the imple-
mentation of several filter functions with switched
capacitor techniques like fully integrated, adjust-
ment free PLL Loop filter, pilot detector with inte-
grator.
This minimizes the number of external compo-
nents.
Due to a highly linear signal processing, using
CMOS-switching techniques instead of standard
bipolar multipliers, very low distortion and very
low noise are obtained also in the stereodecoder
part.
Very low DC stepping is obtained by use of the
BICMOS technology.
ABSOLUTE MAXIMUM RATINGS
PIN CONNECTION
THERMAL DATA
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BLOCK DIAGRAM
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ELECTRICAL CHARACTERISTICS (VS = 8.5V; Tamb = 25°C; RL = 10KΩ; all gains = 0dB; f = 1KHz;
unless otherwise specified, refer to the Test Circuit.)
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ELECTRICAL CHARACTERISTICS (continued.)
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PREAMPLIFIER (VS = 8.5V; Tamb = 25°C; RIN = 600Ω; unless otherwise specified (see test circuit)
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STEREO DECODER PART
ELECTRICAL CHARACTERISTICS (VS = 8.5V; de-emphasis time: T = 50μs; nominal MPX input volt-
age on pin 61 (composite): VMPX = 0.5VRMS (75KHz deviation); modulation frequency = 1KHz;
GI = 1.5dB; Tamb = 27°C; unless otherwise specified)
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NOTES TO THE CHARACTERISTICS
1 INTERMODULATION SUPPRESSION
α2 = VO (signal) (at1KHz)
VO (spurious) (at1KHZ) ; fs = (2 x 10KHz) - 19KHz
α3 = VO (signal) (at1KHz)
VO (spurious) (at1KHZ) ; fs = (3 x 13KHz) - 38KHz
measured with : 91% mono signal; 9% pilot signal; fm=10KHz or 13KHz.
2. TRAFFIC RADIO (V.F.) suppression
α57 (V.W.F.) = VO(signal) (at1KHz)
VO (spurious) (at1KHZ ±23Hz)
measured with : 91% stereo signal; 9% pilot signal; fm=1KHz; 5% subcarrier
(f=57KHz, fm = 23Hz AM, m = 60%)
3. SCA (SUBSIDIARY COMMUNICATIONS AUTHORIZATION)
α67 = VO(signal) (at1KHz)
VO (spurious) (at9KHZ) ; fs = (2 x 38KHz) - 67KHz
measured with : 81% mono signal; 9% pilot signal; fm=1KHz;
10% SCA - subcarrier (fs = 67KHz, unmodulated).
4. ACI (ADJACENT CHANNEL INTERFERENCE)
α114 = VO(signal) (at1KHz)
VO (spurious) (at4KHZ) ; fs = 110KHz - (3 x 38KHz)

α190 = VO(signal) (at1KHz)
VO (spurious) (at4KHZ) ; fs = 186KHz - (5 x 38KHz) -
measured with 90% mono signal; 9% pilot signal; fm = 1KHz; 1% spurious signal
(fs = 110KHz or 186KHz, unmodulated).
5: Control range for High Cut Control and Stereo Blend is VR - 400mV ≤ VSB, VHCC ≤VR
-500 -400 -300 -200 -100 0 VHCC-VR
(KHz) D94AU183
Figure : High Cut Control
-400 -300 -200 -100 VSB - VR0
SEP
(dB)
D94AU184
Figure : Stereo Blend
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ELECTRICAL CHARACTERISTICS (continued)
(*) All thresholds are measured by using a pulse with TR = 2μs, THIGH = 2μs and TF = 10μs.
The repetition rate must not increase the PEAK voltage.
1) NTB represents bits D0 - D2 of NB byte 1
2) NAT represents bits D3 - D4 of NB byte 1
3) OVD represents bits D5 - D6 of NB byte 1
4) FSC represents bits D0 - D1 of NB byte 2
NOISE BLANKER PART
FEATURES:
INTERNAL 2nd ORDER 140KHz HIGH-PASS
FILTER
NOISE RECTIFIER OUTPUT FOR SIGNAL
QUALITY DETECTION
PROGRAMMABLE TRIGGER THRESHOLD
TRIGGER THRESHOLD DEPENDENT ON
HIGH FREQUENCY NOISE WITH PRO-
GRAMMABLE GAIN
ADDITIONAL CIRCUITS FOR DEVIATION
AND FIELD STRENGTH -DEPENDENT TRIG-
GER ADJUSTMENT
BLANKING TIME PROGRAMMABLE BY EX-
TERNAL CAPACITOR
VERY LOW OFFSET CURRENT DURING
HOLD TIME DUE TO OPAMPS WITH MOS
INPUTS
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DESCRIPTION
DESCRIPTION OF THE NOISEBLANKER
In the normal automotive environment the MPX
signal is disturbed by ignition spikes, motors and
high frequency switches etc.
The aim of the noiseblanker part is to cancel the
influence of the spikes produced by these compo-
nents.
Therefore the output of the stereodecoder is
switched off for a time of 40μs (average spike du-
ration).
In a first stage the spikes must be detected but to
avoid a wrong triggering on high frequency noise
a complex trigger control is implemented.
Behind the triggerstage a pulse former generates
the 40μs "blanking" pulse.
In the following section all of these circuits are de-
scribed in their function and their programming,
too (see fig.1).
1.1 Normal Trigger Path (RECT-PEAK, ACT,
PEAK-COMP, BLANK-COMP, BIAS-MONO)
The Incoming MPX signal is highpass-filtered,
amplified and rectified (block RECT-PEAK).
The second order highpass-filter has a corner-fre-
quency of 140KHz.
The gain of the rectifier can be controlled by the
bit D2 of the noiseblanker byte2.
If programming bit D2 to zero the gain is only half
of the nominal value.
All trigger thresholds must be roughly doubled in
this case. The rectified signal, RECT, is used to
generate by peak-rectification a signal called
PEAK, which is available at the PEAK pin.
Also noise with a frequency >100KHz increases
the PEAK voltage. The value of the PEAK voltage
influences the trigger threshold voltage Vth (block
ATC).
Both signals, RECT and PEAK+Vth are fed to a
comparator (block PEAK-COMP) which outputs a
sawtooth-sharped waveform at the TBLANK pin,
it is triggered.
A second comparator (block BLANK-COMP)
forms the internal blanking duration of 40μs.
The noiseblanker is supplied by his own biasing
circuit (block BIAS-MONO).
1.2 Automatic Threshold Control (ATC)
There are two independent possibilities for pro-
gramming the trigger threshold:
a)the minimum threshold in 8 steps (bits D0-D2,
NB-byte 1)
b)the maximum threshold in 4 steps (bits D3-
D4, NB-byte 1) (see fig.2)
The low threshold is used in combination with a
good MPX signal without any noise.
The sensitivity in this operation is high, depending
only on the programmed "Low Trigger Threshold",
bits D0-D2 of the noiseblanker byte 1.
It is independent of the PEAK voltage.
The MPX signal is noisy (low fieldstrength) the
PEAK signal increases due to the higher noise,
which is also rectified (see part 1.1).
With increasing of the PEAK voltage the trigger
threshold voltage increases, too. This particular
gain is programmable in 4 steps (see fig.2).
1.3 Automatic Threshold Control by the
Stereoblend voltage (ATC-SB)
Besides the noise controlled threshold adjustment
there is an additional possibility for influencing the
trigger.
It is controlled by the difference between Vsb and
Vr, similar to the Stereoblend.
The reason for implementing such a second con-
trol will be explained in the following:
The point where the MPX signal starts to become
noisy is fixed by the RF part.
Therefore also the starting point of the normal
noise controlled trigger adjustment is fixed (fig.3).
But in some cases the behaviour of the noise-
blanker can be improved by increasing the
threshold even in a region of higher fieldstrength,
for the MPX signal often shows distortion in this
range.
Because of the overlap of this range and the
range of the stereo/mono transition it can be con-
trolled by Vsb and Vr.
This threshold increase is programmable in 3
steps or switched off (see fig.3).
1.4 Over Deviation Detector (MPX-RECT)
Sometimes when listening to stations with a
higher deviation than 75KHz the noiseblanker
triggers on the high frequency modulation.
To avoid this blanking, which causes noise in the
output signal, the noiseblanker offers a deviation-
dependent threshold adjustment.
By rectifying the MPX signal a further signal rep-
resenting the actual deviation is obtained.
It is used to increase the PEAK voltage.
Offset and gain of this circuit are programmable in
3 steps (the first step turns off the detector, see
fig.4).
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Figure 1: Block Diagram of the Noise Blanker
Figure 2: Trigger Threshold vs. Vpeak
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SUB ADDRESS
LSBMSB LSBMSB LSBMSB
Figure 4: Behaviour of the Deviation Dependent Threshold Adjust (Over Deviation Detector)2 C BUS INTERFACE
Interface Protocol
The interface protocol comprises:
A start condition (s)
A chip address byte, (the LSB bit determines
read/write transmission).
A subaddress byte
A sequence of data (N-bytes + acknowledge)
A stop condition (P)
ACK = Acknowledge
S = Start
P = Stop
I = Autoincrement
MAX CLOCK SPEED 500kbits/s
Autoincrement
If bit I in the subaddress byte is set to "1", the autoincrement of subaddress is enabled.
CHIP ADDRESS DATA 1...DATA n
0.9V
VPEAKD94AU187B
noisy signal good signal
Figure 3: Behaviour of the Field Strength Controlled Threshold Adjustment
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If bit in the subaddress byte is set to " 1", the autoincrement of subaddress is enabled
SUBADDRESS (RECEIVE MODE)
TRANSMITTED DATA (SEND MODE)
AMS = True Blank Detected
SM = Soft mute activated
ST = Stereo (HIGH = active)
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INPUT SELECTOR
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VOLUME
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Partno	Mfg	Dc	Qty	Available	Descript
TDA7420	KENWOOD	N/a	402	avai	MULTIFUNCTION AUDIO PROCESSOR