TDA21302 ,Multi-Phase PWM Controller for CPU Core Power SupplyCharacteristic ... 7 Operating Condition 9 VRD10,x VID Table ....... 10 Application Information .. ..
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TDA21302
Multi-Phase PWM Controller for CPU Core Power Supply
Contents: Features………………………………………………………………………………………………………......3
Application……………………………………………………………………………………………………...…3
Pinout Drawing and Description………………………………………………………………………………..3
General Description……………………………………………………………………………………………...5
Block Diagram…………………………………………………………………………………………………….5
Reference Schematic……………………………………………………………………………………………6
Absolute Maximum Rating....................................................................................................................7
Thermal Characteristic..........................................................................................................................7
Electrical Characteristic........................................................................................................................7
Operating Condition..............................................................................................................................9
VRD10,x VID Table............................................................................................................................10
Application Information.......................................................................................................................11
Voltage Control………………………………………………………………………………………..11
Current Balance……………………………………………………………………………………….12
Load Droop…………………………………………………………………………………………….12
Fault Detection………………………………………………………………………………………...12
Phase Setting and Converter Start Up……………………………………………………………...13
Current Sensing Setting………………………………………………………………………………13
DAC Offset Voltage & Droop Tuning………………………………………………………………..14
Protection and SS Function………………………………………………………………………….15
Design Procedure Suggestion............................................................................................................16
Design Example..................................................................................................................................17
Layout Guide......................................................................................................................................20
Outline Diemension……………………………………………………………………………………………..22
Multi-Phase PWM Conversion with Automatically Phase Selection • VRD10.X Compliant Active Droop Compensation For Fast Load Response • Smooth VCORE Voltage Transition during the VID On The Fly Power Stage Thermal Balance By Sync FET Rds(on) Current Sense Technique Hiccup Mode Over Current Protection Programmable Switching Frequency ( 50KHz ~ 400KHz per Phase ), Under
Voltage Lockout, and Soft-Start • High Output Ripple Frequency times numbers of working Channels Intel Processor Voltage Regulator : VRM10.X • Low Output Voltage High Output Current DC-DC Converters
• Voltage Regulator Modules
Multi-Phase PWM Controller for CPU Core
Power Supply
Application :
Pinout Drawing and Description :
Features :
General Description
TDA21302 is a multi-phase DC-DC buck converter controller integrated all control functions for the next generation GHz CPU
voltage regulator. TDA21302 automatically controls 2 to 4 interleaved buck switching power stage operation. The multi-phase
architecture is able to provide high output current with lower power dissipation on the switching devices and minimizing the
input ripple current and output ripple voltage. The equivalent high operation frequency optimizes the voltage regulator design
for better transient response and thermal performance.
TDA21302 utilizes the Sync FET Rds(on) in every channel as the current sense element. The differential current sense in
every channel results precious channel current information to the controller for good droop adjustment, channel current
balance, channel switching devices thermal balance and over current protection. Block Diagram
SGND
VSEN
VOSS
ISN1
ISP1
ISN4
ISP4
ISP3
ISN3
ISP2
ISN2
VCC PGOOD
Reference Schmatic
Absolute Maximum Ratings
At Tj = 25 °C, unless otherwise specified
Thermal Characteristic
Electrical Characteristic
At Vcc=5V, Tj = 25 °C, unless otherwise specified
At Vcc=5V, Tj = 25 °C, unless otherwise specified
Operating Conditions
At Tj = 25 °C, unless otherwise specified
VRD10,X VID Table Note : “ 1 “ is open and “ 0 “ is connecting to ground.
Application Information : TDA21302 is a multi-phase DC/DC controller that precisely regulates CPU core voltage and balances
the current of different power channels. The converter consisting of TDA21302 and its companion
drivers, TDA21106 and TDA21102, provides high quality CPU power and all the protection functions to
meet the requirement of the latest VRMs.
Voltage Control
The TDA21302 senses the CPU VCORE by an precise instrumental amplifier to minimize the voltage drop
on the PCB trace at heavy load condition. VSEN & SGND are the differential input pins for VCORE and
their output, VDIF, is the input of the PGOOD & OVP sense. The internal highly accurate VID DAC
provides the reference voltage for VRD10,X compliance. Control loop consists of error amplifier, pulse
width modulator, external driver ICs and power components. Like conventional voltage mode controller,
the output voltage is locked at the VREF of the error amplifier and the error signal is used as the control
signal Vc of the pulse width modulator. The PWM signals of different channels are generated by
comparison of EA output and split-phase saw-tooth wave. Power stage transforms VIN to output by
PWM signal on-time ratio.
VID125
SGND
VSEN
VCC PGOOD
Current Balance TDA21302 senses the current of the Sync FET in each phase when it is conducting for channel balance and droop tuning. The differential sensing GM amplifier converts the voltage on the sense components
which can be sense resistors or the Rds(on) of the Sync FET to current signal into internal balance
circuit. The current balance circuit sums and averages the current signals and then generates the
balancing signals injected to pulse signal modulator. If some of the channel current is higher than
average, the balancing signal shall decrease the pulse width to keep the current balance.
Load Droop
The sensed channel current signals regulated the reference of DAC to form a output voltage droop
proportional to the load current. The droop or so-called “ Active Voltage Positioning “ can reduce the
output voltage ripple during the load transient and the size of the LC filters.
Fault Detection
The chip detects VCORE for over voltage and power good detection. The “ hiccup mode “ operation of
over-current protection is adopted to reduce the short circuit current. The inrush current at the start up is
ISN1
ISP1
ISN4
ISP4
ISP3
ISN3
ISP2
ISN2
