TCD102C-1 ,CCD Linear Image SensorTOSHIBA {LOGIC/MEP’IORY} E? DEI‘IDEI?ELIB UDD‘ISEL a r--*.e ---- -W,_ " _,,, ----e "-i"-V'-_- -_'"" ..
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TCD102C-1
CCD Linear Image Sensor
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The TDS102C-1 ls a high resolution
and high sensitivity 2048 element
linear image sensor.
i The sensor ls designed for Fac-
simile readers, optical Character
Recognition and other optical appli-
cations. The device contains a row
', of 2048 photodiodes which provide
a 8-11ne/mm resolution across a M
size paper with well blue response.
The TCD102C-1 is capable of high speed
operation up to a 10 “Hz data rate,
I and incorporate on-cup sample-and-
hold circuitry. 402200
FEATURES: i
. Number of Image Sensing Elements: 2048
. Image Sensing Eleme'nt Size: Mum by Mum on 11mm centers.
. Photo Sensor Structure: High sensitive P-n photo diode. l
. clock: 2-phase.
. On-chip Circuitry: Sample-and-hold circuitry.
. Dynamic Range: 600(Typ.).
. Package: 22 pin DIP with Hermetic sealed
optical glass window.
PIN CONNECTIONS
MAXIMUM RATINGS "oPd"'0
CHARACTERISTIC SYMBOL RATING UNIT 05E 1 El NC
Clock Pulse Voltage Vgs SEE Ens /.
Shift 'Pulse Voltage VSH ncE Ei] OD
Reset Pulse Voltage 11RS SPE Eil No
Sanple-and-Hold Pulse Voltage vsp -0.3s15 V NOE El no
outpiCfranssstor Drain Voltage VOD SSE 17 ss
.' Input Gate Voltage VIC “CE Ciis] No
Input Source Voltage VIS “CE " "
, Operating Temperature Top: -25'Hi0 "c ME Eilse
, Storage Temperature Tstg .-4tyv100 "c Is IO 15 Ia
Note: All Voltages are with respect to SS terminal. SHE 'C048 12 NC
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CIRCUIT DIAGRAM
sen A:ALoa SHIFT RESISTER 2
san’r GATE
ELECTRODE
sn FT DATE
23D ANALOG SHIFT RESISTER 1
PIN NAMES
" Clock (Phase 1)
62 Clock (Phase 2)
SH Shift Gate
RS Reset Gate
os Output Transistor Source
tip Sample-and-hold Gate
OD Output Transistor Drain
SS Substrate (Ground)
IS Input Source (Test Point)
IG Input Gate (Test Point)
NC Non Connection
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OPTICAL AND ELECTRICAL CHARACTERISTICS
Ta=25°C, v0D=vIs=12v, vm=0v, vg--vRsy--vsw--12v (PULSE)
V0.5, fRS=1MHz, tINTaNTEcRATIon TIME)=10 msec,'
LIGHT SOURCE=DAYLiGHT FLUORESCENT LAMP
CHARACTERISTIC SYMBOL CONDITION MIN. TYP. MAX. UNIT
Responsivity R 0.86 1.08 1.30 V/lx-sec
1',1"/,'dr't17nse Non mm (Note I) - - tlo ,
Saturation Output: Voltagé VSAT Von=11.4V 0.8 1.0 - V
Saturation Exposure SE VSAT/R 0.62 1.0 - Ix.see
Dark Signal Voltage VDRK Vop=13V - 1.8 10 mV
DC Power Dissipation PD Von=13v - 30 60 mil
Total Transet Efficiency TTE 92 95 - 2,
Output Impedance 20 - 900 2500 tt
Dynamic Range DR VSAT/VDRK - 600 -
Note: (1) Measured at 50% of SE
Definition of PRNO.. PRNU=L1- x 100 (7.)
where 7 ls average of total photodiode outputs and " ts
deviation of photodiode output under uniform Illumination.
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OPERATING CONDITION (Ta=25°c)
ciARAcrERrsrsc SYMBOL MIN. TYP. MAX- UNIT REMARKS
H-LEVEL 11 12 13 v
Clock Pulse voltage L-LEVEL vg 0.0 o. 5 0.8 ll
R-LEVEL ll
L-LEVEL ,9“ 0.0 0.5 0.8 v
Shift Pulse Voltage
H-LEVEL 11 12 13 Il
Reset Pulse Voltage L-LEVEL VRS o.o 0.5 0.8 ll
Sample-and-hold H-L1WEL VS? 11 12 13 il (1)
Pulse Voltage . L-LEVEL tr.N 0.5 0.8 V
Output Transistor Drain Voltage Von 11.4 12 13
Input Gate Voltage VIG 0 0 1
Input Source Voltage V13 11 12 13
Note: (1) Supply DCIZV to SP terminal when sample-and-hold circuitry is
not used.
CLOCK CHARACTERI STICS (Ta=25°C)
CHARACTERISTIC SYMBOL MIN. TYP. MAX. UNIT REMARKS
Clock Pulse Frequency f5 - 0.5 - MHz
Reset Pulse Frequency fRS - 1 v Hllz
"Clock Input Terminal Capacitance ct - 900 - pF
Shift Gate Capacitance CSH - 250 - pF
Reset Gate Capacitance CRS - 10 - pl?
Sample-and-hold Gate Capacitance Csp - 10 - pF
Note: Insert load resister (1K9) between os and SS in case that fRSa5MHz
TIMING CHART
tINT (INTEGRATION TIME) .
SIGNAL OUTPUTS OUTPUTS
(2048 ESEMEINTS) 4HJ‘M‘NTS)
DUMMY OUTPUTS (52 ELEMENTS)
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1 LINE SCANNIHG TIME (MIN) (2084. ELEMENTS)
OS‘: ngnal Outputs in non OS“: Signal outputs ln
Sanupl— and. hold operation smr.pln-:Ind hold
operation
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TIMING REQUIREMENTS
"IDEO DAT
VIDEO DATA
TIDEO SIGNAL
_ CHARACTERISTIC SYMBOL MIN . TYP . MAX. UNIT
I Pulse Timing of SH and h t1 , t5 0 100 - nsec
" Rise Time, Fall Time M , t4 0 50 - nsee
SH Pulse Width t3 60 300 - nsec
¢1,¢2 Rise Time, Fall Time ur , t7 0 100 - nsec
M Rise Time, Fall Time te . tlo 0 20 - nsec
RS Pulse Width t9 40 250 - nsec
Pulse Timing of¢1,¢2and RS tll 10 250 - nsec
SP Rise Time, Fall Time tlg, tlh 10 20 - nsec
SP Pulse Width :13 60 100 - nsec
Pulse Timing of SP and RS I t15 20 50 - nsec
Note ' fRs=1MHz(Typ.)
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kaLAT I VE RESPONSE
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' WAVE. LENGTH (mu)
AVERAGE DARK SIGNAL - INTLORATIGN TIME
AT DIFFERLNT TLMPERi-TUHLS
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DARK SIGNAL OUTPUT
bATUHA’l‘lUN OUTPUT
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INTEGRATION TIME. (see)
E -40-
PROBLEM HARD COPY
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CAUTION
I. window Glass
The dust and stain on the glass window of the package degrade optical
performance of CCD sensor.
Keep the glass window clean by saturating a cotton swab in alcohol and
lightly wiping the surface, and allow the glass to dry, by blowing with
filtered dry N2 or fleon gas.
Care should be taken to avoid mechanical or thermal shock because the
glass window ls easily to damage.
2. Electrostatic Breakdown
Store in shorting clip or in conductive foam to avoid electrostatic
breakdown.
3. Incident Light
CCD sensor is sensitive to Infrared light. Note that infrared light
component degrades resolution and PRNU of COD sensor.
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' PACKAGE OUTLINE (4D220-C) -
"t " Unit in mm
" '." 41.6:05
28672 l X2048
£95i05
322:05
I (197205
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L © TOP OF CHIP TO BOTTOM OF CERAMIC.
a GALSS THICKNESS (n=1.5)
www.ic-phoenix.com
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