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TC9245FTOSHIBAN/a200avaiRECEIVING DEMODULATION IC FOR AUDIO INTERFACE
TC9245NTOSHIBAN/a14avaiRECEIVING DEMODULATION IC FOR AUDIO INTERFACE


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TC9245F-TC9245N
RECEIVING DEMODULATION IC FOR AUDIO INTERFACE
TOSHIBA TC9245F/N
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC9245F,, TC9245N
RECEIVING DEMODULATION IC FOR DIGITAL AUDIO INTERFACE
TC9245F, TC9245N are a receiving demodulation IC for TC9245F
digital audio interface developed in accordance with EIAJ
"CP-340 Standard".
FEATURES
0 Compatible with SCMS (Serial Copy Management System).
0 Compatible with 4 inputs including both coaxial and
optical inputs.
o Performs 2 kinds of error detection, i.e., synchronizing
signal detection and parity check. SOP28-P-450-1.27
If an error is detected, output data is muted for a fixed TC9245N
PLL circuit can be easily constructed by built-in VCO.
o Built-in pseudo-Iocking preventive function assures
positive locking.
0 With VCO oscillation stop function.
CMOS silicon gate construction with low power
dissipation.
o 2 kinds of package, 28pin flat package and 28pin DIP . SDlP28-P-400-1.78
shrunk package. Weight
SOP28-P-450-1.27 : 0.89 (Typ.)
BLOCK DIAGRAM SDlP28-P-400-1.78 : 2.2g (Typ.)
F g - 8 I <
8 a a 8 a li,' g l it, St 2
> LL u. u. - Lu Lu .1
1 1 1 1
BI-PHASE MODULATED CHANNEL STATUS TIMING
SIGNAL DEMODULATION DEMODULATION
CIRCUIT CIRCUIT GENERATOR
MULTIPLEXER
FREQUENCY
DETECTION
VDDA ‘°
DOUT a
FCONT \'
VCOI NH
1 2001-06-19
TOSHIBA
TC9245F/N
PIN FUNCTION
PIN FUNCTIONAL DESCRIPTION
No. SYMBOL I/C) PARALLEL MODE l HQ l SERIAL MODE REMARKS
1 DOUT O INO~IN2 selecting output tTInal" With a pull-down resistor+switch.
When selecting IN3, output IS fixed at "L".
Microcomputer interface mode selecting input terminal.
2 SEL I Compatible with the parallel mode when this terminal is at "H" With a puII-up resistor.
level or open and the serial mode at "L'' level.
4 INI . . .
5 IN2 I Digital audio data input terminal. With a pull-down resistor+switch.
7 FCONT O PLL mis-lock detection signal output terminal. 3-state output.
8 PD 0 Phase comparator phase error signal output terminal. 3-state output.
9 VDDA - Analog supply voltage terminal. -
10 AMPI I LPF operational amplifier input terminal. -
11 VCOI O feratior.", Tplifier output terminal. -
(VCO oscillation control voltage output)
12 m I VCO oscillation stop control input terminal. -
13 NC - Non connection terminal. -
14 VssA - Analog ground terminal. -
15 vss - Digital ground terminal. -
16 DATA 0 Digital audio data output terminal. -
17 BCK 0 Bit clock output terminal. (32fs) -
18 LRCK O LR clock outhut terminal. C) LR clock output ter'minal. -
L/ R-ch polarity fixed. L/ R-ch polarity variable.
19 EMPH O Emphasis output terminal. Emphasis is available at "H". -
20 ERR-OR 0 Error detection flag output terminal. Error is detected at "L". -
21 W I Test terminal. With a puII-up resistor.
22 F5384 0 384fs clock output terminal.
I I 192fs or 128fs clock output
23 Sl I Input selecting terminal. 0 . -
terminal.
Microcomputer data input/
24 S2 I Input selecting terminal. I output mode selecting With a puII-up resistor.
terminal.
25 COPY O 53%;?in flag output I/O Microcomputer data input/
Copy is inhibited at "L". output terminal. . .
Microcomputer data latch With a 'HI-up resistor.
26 FSI O I I I . . Open drain output.
Sampling frequency bit pulse input terminal.
decoding output terminal. Microcomputer data transfer
27 F52 O I . .
clock input terminal.
28 VDD - Digital power supply voltage terminal. -
2001 -06-1 9
TOSHIBA TC9245F/N
DESCRIPTION OF OUTLINE
1. Mode setting
The communication modes are set by setting the SEL terminal at "L" or "H" level.
The parallel communication mode is set statically and the serial communication mode is set by
inputting 3 signals of serial data, transfer clock and latch pulse as shown in Fig.1.
Table.1 Terminal name change table
PIN NAME
PARALLEL SERIAL I/O FUNCTION IN SERIAL COMMUNICATION MODE
S1 CKOUT C) 192fs or 128fs clock is output.
S2 Ito I The butpnt mode when the Ticr.ocoTpute.r I/O mode selecting
terminal IS at "H" level and the input mode at "L" level.
FSI W I W=H : Data output trigger signal input.
W=L : Data latch pulse input.
FS2 TtTk- I Data transfer clock input.
W=H : Channel status output.
Itto=L : Internally set serial data input.
CO PY PDATA I / O
(a)Parallel communication mode .' (SEL=H)
In this mode, sampling frequency is decoded and output by 2 bits of FSI and F52 and input data
(internally taken in) and DOUT output data by S1 and Sit as shown in the following table :
Table.2 Sampling frequency encode table Table.3 Input/Output setting table
FS2 FSI Fiestas s2 SI ")Jgl1/l) DOUTPIN
L L 44.1kHz L L INO INO
L H - L H IN1 INI
H L 48kHz H L Ibl2 IN2
H H 32kHz H H IN3 "L" fix
(b)Serial communication mode : (SEL=L)
In this mode, SI and S2 are input in the data input mode and channel status signals shown in
Table 5 are output to the outside in the data output mode.
The data input and output modes are briefly explained hereinafter.
It Data input mode : (I/-O--L)
In this mode, 4 bits of S1, sa, LRS and 192s can be input. -.-.-
Each of these bits is taken in the_|_C at the trailing edge of SCK and the internal mode is
updated at the trailing edge of LP.
5(an I I
scis2)llllllll
I41DATA(COPY)| SI I S2 I LRS I 1925 I
Fig.1 Serial data input timing
3 2001-06-19
TOSHIBA TC9245F/N
Table.4 Internal setting by serial data
SERIAL DATA FUNCTION DESCRIPTION
SI, S2 The same operation as S1 and Sit terminal in the parallel setting mode.
LRS Changes phase of LRCK. L : The same as the parallel mode.
H : Inverse output.
"H": 192fs clock is output through the CKOUT terminal.
192S "L" : 128fs clock is output.
It Data output mode : (W)=H)
In this mode, the channel status bits shown in Table.5 can be monitored.
Each channel status bit is output as serial data.
The serial data output timing is shown in Fig.2.
5(an LI
#DATA (COPY) I ERS-tOR I FSI I FS2 I F53 I F54 ICOPYI CCI |cc2 I CC3 Icc4 I ccs I cce I CC? I col NOIN
Fig.2 Serial data output timing
Table.5 Contents of serial data output
SYMBOL CONTENTS
ERROR Error detection result
COPY Copy flag
CC1~8 Category bit
FS1~4 Sampling frequency bit
NOIN No signal detected at selected input terminal
(Note 1) In order to cope with SCMS, sampling frequency bits are not decoded.
Further, in the actual serial data output, parity (even parity from the top bit ERROR) is
output for every data bit as shown in Fig.3.
7 (FSI) LI
sc-K (F52) I I I I I I I I
pDATA(COPY) I ERROR I PARITY1 I FSI I PARITYZ I F52 I PARITY3 I
Fig.3 Parity output timing of serial data output mode
4 2001-06-19
TOSHIBA TC9245F/N
2. Detection of error
If an error is detected, the -tTtTitjT1" terminal is set at "L" level and output data is muted.
In addition, the channel status latch operation is inhibited and a preceding value is held.
If the no error status continues for times shown in the following table, the -trtTit5TI' terminal is set
at "H" level, returning to the normal operation.
PERIOD OF
EIRROB
ERittNt TERMINAL I i I
DATA TERMINAL N I MUTE /
CHANNEL STATUS (pLsdf)sft's"_1fayTul,(J(J(J(J(J(J(J(.)
L_.B_s
Fig.4 Internal operation timing at error
Table.6 Error detecting operation releasing time
SAMPLINiskEI'SQUENCY ERROR, aQEgSERMINAL CHANNEL STATUS tB (ms)
32 384.0 288.0
44.1 278.6 209.0
48 256.0 192.0
3. Detection of no input
Detecting existence of lhl0--3 input signals, oscillation of VCO is automatically suppressed to low if
no edge is detected for a fixed time.
Table.7 No input judging time of input data
'AM''w%l1tQUENcY TIME FROM LAST EDGE (ms)
32 approx. 1000
44.1 approx. 750
48 approx. 700
4. Detection of mis-lock
Detecting mis-Iock by comparing input signal with oscillation frequency, outputs a signal to escape
from the mis-Iock through the FCONT terminal.
HIGHER THAN OBJECTIVE LOWER THAN
OBJECTIVE FREQUENC FREQUENCY OBJECTIVE FREQUENCY
FCONT OUTPUT I
Fig.5 Mis-Iock detection timing
5 2001-06-19
TOSHIBA TC9245F/N
5. Digital data input terminal
The configuration of IN0--3 input multiplexer is shown in Fig.6.
Considering crosstalk to other terminals, an unused terminal can be pulled down by resistors
through ON/OFF of the internal switch.
FEEDBACK RESISTOR SWITCH
PULL-DOWN RESISTOR
- -DIGITAL DATA INPUT
MULTIPLEXER
SWITCH
Fig.6 Configuration of input multiplexer
MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage VDD -0.r-6.0 V
Input Voltage VIN -0.3--VDD+0.3 V
Power Dissipation TC9245F PD 600 mW
TC9245N 800
Operating Temperature Topr -25--75 "C
Storage Temperature Tstg - 55-150 °C
6 2001-06-19
TOSHIBA
TC9245F/N
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta =25°C, VDD-- 5V)
DC characteristics
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Operating Supply Voltage VDD - Ta-- - 25~75°C 4.75 5.00 5.25 V
Operating Supply Current IDD - - - 15.0 25.0 mA
"H" Level VIH - VCOINH, TEST, s1, Sa, SEL, COPY, FS1, 4.0 - VDD
Input Voltage " V
"L Level " - FS2, |N0~3 0.0 - 1 0
Input Amplitude VIN - INO--3 0.4 - 5.0 Vp-p
"H" Level IIH(1) - VIH=5.0V - - 1.0
Input Current (1) " S1, AMPI
"L Level IIL(1) - VIL=0.0V -1.0 - -
"H" Level 'IH (2) - VIH = 5.0V - 10 -
Input Current (2) " " INO~3 pA
L Level IIL (2) - " = 0.0V - - 10 -
"H" Level I - V = 5.0V - - 1.0
Trystate Leak " " TLH FCONT, PD IH
Current L Level ITLL - VIL = 0.0V - 1.0 - -
"H" Level I (1) - - V = 4.5V - - - 1.0
Output Current (1) " " OH EMPH, ERROR OH
L Level IOL (1) - VOL = 0.5V 2.0 - -
"H" Level I 2 - DATA, BCK, LRCK, v =4.5v - - -2.0
Output Current (2) " " OH( ) OH
L Level IOL (2) - F5384, DOUT VOL = 0.5V 4.0 - - mA
"H" Level IOH (3) - S1, FCONT, PD VOH=4.5V - - -4.0
Output Current (3) "L" L I I (3) S1, FCONT, PD, V =0 5V 8 0
eve OL - COPY, FS1, F52 OL-- . . - -
PulI-up Resistor RUP - VCOINH, TEST, S2, SEL, COPY, FS1, FS2 - 20 - kn
Pull-down Resistor RDOWN - INO--3, DOUT - 1 -
AC characteristics
(1) Clock system and data output system timing
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Output Rise Time tor - F5384, BCK, LRCK, DATA - - 15 ns
Output Fall Time tof - CKOUT(S1) - - 15
. "H" Level tPHL - - - 25
Delay Time " " BCK-SDATA, LRCK ns
L Level tpLH - - - 25
tof tor
tor tof
CKOUT (SI) N /
tor t0f
BCK -/-Clt'tt'/Tc/-u/-u/-
tor. tof
DATA X X
- tPLH - tPHL
LRCK tor tof
7 2001-06-19
TOSHIBA TC9245F/N
(2) Microcomputer interface system timing (SEL=L : Serial communication mode)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Transfer Time ll' Level tpHL - S_CK-9/tDATA - - 1 ps
L Level tpLH - LP-9PDATA - - 0.2
Strobe Pulse Width twp - ITi' 0.5 - - ps
Clock Pulse "H" Level tWH - - 1 - -
Width "L" Level tWL - SCK 1 - - ps
. tSUP1 my-o/UO/rr/s 0.2 - -
Setup Time tsupz - pDATA-sSCK 0.5 - - ps
Hold Time tHLD - 'tR-Ari 0.5 - - ps
0 Data input mode (WhL) :
D(FSI) tsup1 i' 1
tWL tWH tHLD
Scis2) -s' i 1 / N / l ,
pDATA(COPY) ( 51 X $2 X LRS X 192S /
0 Data output mode (W)=H) :
W ($2) _/I
E (FSI) C)
tWL tWH
tsum ltPHL: tPLH ItPHL: tPLH
PDATA (COPY) ()(ERioRr1XFs1Xp2)(Fs2)(s%
8 2001-06-19
TOSHIBA
TC9245F/N
APPLICATION CIRCUIT
1. Parallel setting mode
SELECTOR OUTPUT
DATA INPUT
pr-COM
2001 -06-1 9
TOSHIBA
TC9245F/N
2. Serial communication mode
SELECTOR OUTPUT
DATA INPUT
2001 -06-1 9
TOSHIBA
PACKAGE DIMENSIONS
SOP28-P-450-1.27
2i'pppcpopppppp1i'----,----
8 8:0 2
1 1.8:03
j? "ynluuuloojj,
0.995TYP - T 0.43:0.1 j5lolysliif _
1.27 _ _
L 19.0MAX
18.5Hh2
Weight : 0.8g (Typ.)
TC9245F/N
Unit : mm
(450mil)
I I 1.0i0.2
2001 -06-1 9
TOSHIBA TC9245F/N
PACKAGE DIMENSIONS
SDIP28-P-400-1.78 Unit : mm
28 15 "i
J""''1r-1rOC''lf-ll-1l-1r-1f-1i-lr-nFTr-1I-'l O
3) 3 g
l-It-JI-lL-llc-JL-lL-dt-ICJ/lr-lr-IL:
26.1MAX
25.6K0.2
“a r'?-
-a- m.
1 .243TYP 04610.1
Weight : 2.29 (Typ.)
12 2001-06-19
TOSHIBA TC9245F/N
RESTRICTIONS ON PRODUCT USE
000707EBA
OTOSHIBA is continually working to improve the quality and reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe
design for the entire system, and to avoid situations in which a malfunction or failure of such
TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please
keep in mind the precautions and conditions set forth in the "Handling Guide for
Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics
applications (computer, personal equipment, office equipment, measuring equipment, industrial
robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor
warranted for usage in equipment that requires extraordinarily high quality and/or reliability or
a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended
Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship
instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA
products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade
OThe information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of
intellectual property or other rights of the third parties which may result from its use. No
license is granted by implication or otherwise under any intellectual property or other rights of
TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
13 2001-06-19
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