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TC90A13FTOSHIBA ?N/a1000avai3 LINE DIGITAL Y/C SEPARATION IC
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TC90A13F-TC90A13N
3 LINE DIGITAL Y/C SEPARATION IC
TOSHIBA TC90A13N/F
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC90AI 3N, TC90AI 3F
3 LINE DIGITAL NIC. SEPARATION IC
The TC90A13N and TC90A13F separate luminance (Y) and TC90A13N
chrominance (C) signals from an NTSC composite video
signal. It employs the Toshiba original logical comb filter
to realize high performance Y/C separation at low cost.
FEATURES
0 NTSC system
c PLL 4X multiplication circuit SDIP28-P-400-1.78
0 Sync. tip clampping circuit TC90A13F
o 8bit A/D converter
0 8bit D/Aconverters (2ch)
0 2H line memory
0 Dynamic comb filter
0 1 line dot correction circuit
SOP28-P-450-1.27
0 Vertical enhancer Weight
SDIP28-P-400-1.78 : 1.7g (Typ.)
0 Color killer mode (Y/C separation OFF) SOP28-P-450-1.27 : 0.8g (Typ.)
o chrominance wide band output mode
0 SDIP28/SOP28 package
0 5V single power supply
1 2001-06-19
TOSHIBA
TC90A13N/F
BLOCK DIAGRAM
ADIN 5 ADC 1H Line Memory
CLAMPC 7 Clamp 1H Line Memory
CKIN 11
VFIL 1
TERMINAL CONNECTION DIAGRAM
VENHO VENH1
Vertical Edge
Enhancement Circuit
Dynamic
Comb Filter
Coring
Circuit
Pedestal
Color Killer
Circuit
1 Line Dot
Correction
Circuit
ILINE CBPF
VREFL C
V551 (iD
VDD1 @
VREFH C
ADIN Ci)
BIAS1 GD
CLAMPC Ci)
TEST1 ci.
1 /2VDD (i)
VFIL 10
CKIN 0
VDD2 Cid]
VSS2 Q
KILLER Ci?
D V554
Cir) VDD4
D VREF1
is) YOUT
D BlAS2
D COUT
D BIAS?
D V553
D V003
D CORING
D ILINE
D VENH1
G) VENHO
D CBPF
(TOP VIEW)
KILLER
2001 -06-1 9
TOSHIBA TC90A13N/F
TERMINAL FUNCTION
KILL“ NAME FUNCTION fe'. NAME FUNCTION
1 VREFL Bias for ADC 15 CBPF L : C-BPF=WIDE, H : NARROW
Vertical ed e enhanced level
2 I/SSI GND for ADC 16 VENHO (VENHO, VENH1)=(L, L)=OFF
3 VDD1 VDD for ADC 17 VENH1 En' 313112319 H) =MID,
. L : 1 line color ON
4 VREFH Bias for ADC 18 ILINE H : 1 line color OFF
. . L : Coring ON
5 ADIN Video input 19 CORING H : Coring OFF
6 BIAS1 Bias for ADC 20 VDD3 VDD for digital
7 CLAMPC Clamp filter 21 V553 GND for digital
8 TEST1 Test terminal 22 BIAS? Bias for DAC
9 1/2VDD Bias for line memory 23 COUT C output
10 VFIL VCO filter 24 BIAS2 Bias for DAC
11 CKIN Clock input 25 YOUT Y output
12 VDD2 VDD for PLL 26 VREF1 Bias for DAC
13 V552 GND for PLL 27 VDD4 VDD for DAC
14 KILLER L : Color, H : B/W mode 28 V554 GND for DAC
(Note) Pin9 and Pin 26 require external bias
3 2001-06-19
TOSHIBA TC90A13N/F
FUNCTION BLOCK DESCRIPTIONS
Input clamp (CLAMP)
This block performs sync tip clamping of the composite video signal. It provides a feedback signal
for clamping A/D-converted minimum data at Y/C separation to the internal DC bias level.
. A/D converter (ADC)
This block comprises a high-speed series-parallel 8bit A/D converter that accepts an input video
signal of 1-5Vp-p (from sync level to 100% white level).
1H memory
This block consists of DRAM resident line memory for 1H delay. The 3-Iine comb filter is configured
from two pairs of line memory.
Vertical edge enhancement circuit (VENH)
This block enhances the uncorrelated components among the three lines of the luminance signal
following coring. There are three enhancement level selections of HIGH (1.9dB), MID (1.0dB) and
LOW 0.5dB). The luminance signal, obtained by subtracting the chrominance signal from the
composite video signal, is added to the vertical edge enhancement component and output through
the D/A converter. However, this output signal is limited to the pedestal level (fixed internally) by
the pedestal clipping circuit (except for the sync tip level).
Horizontal band-pass filter (BPF)
In this block, with fsc as the center frequency of the BPF, the chrominance signal is extracted from
the 0H, 1H and 2H delayed composite video signal. Since the EFF for the chrominance signal output
can be controlled (ON or OFF), the chrominance output can therefore be switched between a
narrow band width and a wide band width.
Vertical dynamic comb filter (DCF)
This block comprises a band-pass filter that extracts the vertical component of the chrominance
signal. Using Toshiba original logic, a correlation of the three lines is sought for. The absence of
correlation is taken as an indication of a luminance signal, at which time chrominance signal output
is suppressed.
1-line dot correction circuit
Previously, a I-line-only chrominance signal was processed as a luminance signal resulting in dot
crawl. This circuit prevents this problem by extracting the 1-line dot component and adding it to
the dynamic comb filter output. This circuit block can be set ON or OFF.
Clock and memory timing generator (RTIM)
This block supplies a 4 fsc (PLL 4X multiplied) buffered signal to the other circuit blocks, and also
generates a timing signal for the memory.
D/A converter (DAC)
This block comprises a high-speed 8bit D/A converter. It provides Y output at approximately
Im/p-p and burst-level C output at approximately 572m1/p-p.
4 2001-06-19
TOSHIBA TC90A13N/F
MODE TABLE
2:13.: PC'EJFS (2llt 511:]. 1''11e, CELWG MODE ACTION
L - - - - - Y/C separation ON Color mode
H - - - - - Y/C separation OFF B/W mode (Killer)
Chrominance si nal
- L - - - - horizontal ban:J width 1asses.through. BPF for
WIDE chrominance signal output
- H - - - - f,tr,ioz:,i,ntrLs,iy:ildth Does y" pass.thro.ugh BPF for
NARROW Chrominance signal output
- - L L - - Vertical enhance OFF No vertical enhancement
- - H L - - Vertical enhance level Vertical enhancement level
MID 0.5dB
- - L H - - Vertical enhance level Vertical enhancement level
LOW 1.0dB
- - H H - - Vertical enhance level Vertical enhancement level
HIGH 1.9dB
- - - - L - 1 line color ON 1 line dot correction circuit ON
- - - - H - 1 line color OFF 1 line dot correction circuit OFF
- - - - - L Coring ON Coring circuit ON
- - - - - H Coring OFF Coring circuit OFF
RATINGS AND CHARACTERISTICS
The following specifications were obtained in part from the test circuit shown on page 8.
MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Power Supply Voltage VDD Vss--vss + 6.0 V
Input Voltage VIN -0.r-VDD+th3 V
. . . TC90A13N 900
P D at on P Note mW
ower Issnp I TC90A13F D ( ) 600
Storage Temperature Tstg - 55-125 "C
(Note) Ta = 75°C
RECOMMENDED OPERATING CONDITIONS
CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Power Supply Voltage VDD - 4.75 5.0 5.25 V
Input Voltage VIN - 0 - VDD V
Operating Temperature Topr - - 10 - 75 "C
5 2001-06-19
TOSHIBA TC90A13N/F
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS (Ta = 25°C, VDD = 5V)
CHARACTERISTIC SYMBOL Egl- TEST CONDITION MIN. TYP. MAX. UNIT
Power Supply Voltage VDD 1 4.75 5.0 5.25 V
Supply Current IDD 1 40 60 80 mA
Output Voltage Level YOUT 1 3.0 3.15 3.3 V
COUT 3.9 4.0 4.1
VREFL 1.4 1.5 1.6
VREFH 3.4 3.5 3.6
ADIN CLOCK = 3.579545MHz 1.5 1.6 1.8
BIAS1 500mVp-p 0.8 1.4 2.4
Pin Voltage Level BIAS2 1 VREF1=3.0V 0.8 1.6 2.6 V
BIAS3 1/2VDD = 2.5V 2.4 3.4 4.4
CLAMPC VIN =No input (Note 2) 2.0 3.0 4.0
VFIL 0.9 1.9 2.9
CKIN 1.5 2.2 3.0
Input Voltage High Level VIH 1 4 - - V
Low Level VIL 1 - - 1
ADIN Pin Input Capacitance CIN 1 - 50 - pF
Pull Down Resistance Rm 1 25 50 100 kit
(Note 1) External bias must be applied at Pin9 and Pin 26.
(Note 2) IDD is 1/iN=modulated lamp wave.
6 2001-06-19
TOSHIBA
TC90A13N/F
AC CHARACTERISTICS
Y output (Ta =25°C, VDD-- 5V, Clock frequency 3.579545MH2, 0.5Vp-p, S1 =2, VREF1 =3.0V)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Input Level VIN 1 0--140IRE - 1.5 1.6 Vp-p
52:2, S3=2, S4=1, 55:2
Low Frequency Gain GV 1 1hN=15.734kHz, 1.5vp.p -o.5 0.0 0.5 dB
Vdc=2.5V
MTF1 1 S2=2, S3=2, f2/f1 -2.0 -1.2 -0.5
S4= 1, S5 =2
Frequency Response VIN =1 5V dB
- . p-p - - -
MTF2 1 Vdc=2.5V f4/f1 3.0 2.0 1.5
S2 = 2, S3 = 2,
Comb Characteristics Comb 1 S4=1, S5=2 f2/f3 40 45 - dB
Vdc=2.5V
Ls 1 S2=1, S3=1, Y1/Y2 35 40 43
. . . S4= 1, S5 =2
Linearity (Fig.1) VIN =5 step signal %
L 1 - . ' S/Y2 57 60 63
y 1-5Vp-p (Fig.2)
52:1, 53:1, S5=2
VIN =15.734kHz, 1.5vp.p
Output Impedance 20 1 Vdc=2.5V 250 400 700 n
2 -N/1_-1/2 x400
o- 1/2
V1:S4=1, V2 : 54:2
Clock Leakage 52:2, 53:2, 54:1, 55:1
(4fsc Components) Lck 1 VIN =No input - 5.0 20 mVrms
Fundamental Clock Leakage 52:2, 53:2, 54:1, 55:1
(fsc Components) Lsc 1 VIN=No input - 1.0 2.0 mVrms
7 2001-06-19
TOSHIBA
TC90A13N/F
C output (Ta =25°C, VDD=5V, Clock frequency 3.579545MH2, 0.5Vp_p, S1 = 1, VREF1 =3.0V)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
52:2, 53:2, 54:1, 55:2
Difference of amplitude
WIDE BWCW 1 between Ifsc and Ifsc- -0.5 -0.2 -
503496Hz
BPF V|N=1.5Vp_p, Vdc=2.5V dB
Characteristics S2 = 2, S3 = 2, S4=1, S5 = 2
Difference of amplitude
NARROW BWCN 1 between Ifsc and Ifsc- -1.0 -0.5 -
503496Hz
VIN =1.5vp_p, Vdc=2.5V
. S2=2,S3=2,S4=1,S5=1 - - -
Gain CV 1 lhN=fsc, 430mVp-p 2.0 0.9 0.6 dB
S2 = 2, S3 = 2,
. . S4 = 1, S5 = 2
Comb Characteristics Comb 1 1hN=430mVp-p, f3/f2 30 35 - dB
Vdc = 2.5V
52:2, 53:3, 54:1, 55:1
Differential Gain DG 1 VIN =5 step signal, 0 2 5 %
Y=140IRE =1.51/p-p
C =40IRE (Fig.2)
Differential Phase DP 1 DG=(Comax-Comin)/ 0 2 5 Cy
Comax (Fig.3)
S2=2, S3=2, 55=2
VIN =15.734kHz, 1.5Up-p
Output Impedance Zo 1 1/dc=2.5V 250 400 700 fl
2 -.1/1-_1/il x400
o- 1/2
V1 : 54:1, V2 : 54:2
Clock Leak 52:2 53:2 54:1 55:1
L 1 ' ' ' - . 2 V
(4fsc Components) ck VIN =No input 5 0 0 m rms
Fundamental Clock Leak 52:2, 53:2, S4= 1, 55:1
(fsc Components) Lsc 1 VIN =No input 0.3 1.0 mVrms
f1=15.734kHz, f2 =3.587412MHZ, f3 =3.595279MHZ, f4=4.783216MHz
PLL CIRCUIT CHARACTERISTICS
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
PulI-in Frequency Range fck 1 - 3.57 3.58 3.59 MHz
Input Amplitude
(fsc Components) Vck 1 - 0.4 0.5 - Vp-p
8 2001-06-19
TOSHIBA TC90A13N/F
TEST CIRCUIT 1
o w T" o
E a I I u.
o T: E E g
U) q-" > > U
19 18 17 16 15
C) T C 9 0 A 1 3 N / F
? 7 8 9 10 11 14
_- u. U- u.
1 o s g t g, 3 :1
+ S5 o' o o F g LL00 F
T" ts o A'- o
C) un Jii' - O
3 C) O.
Tu, c:
"T7 Lu
5V VIDEO IN 2.5V CLOCK
Oscilloscope
Spectrum
analyzer
Vector
9 2001-06-19
TOSHIBA TC90A13N/F
Linearity test (Fig.1) 5 Step signal (Fig.2)
Cin 3S8MHz(40IRE)
E cf F? g s;
; 8 fb' T. T. :
- 31L an. a - ac].
l 1H 63.5ps I
Chroma differential gain (Fig.3)
REFERENCE DATA
(Fig.4-a) Definition of vertical edge enhancement
FULL SCALE = O~255
f Lr’alf -
OUTPUT
Li-l-L-l-l-T-u-l-
(Note) The output signal, to which the vertical edge enhancement component is added, is
limited to pedestal level by the pedestal clip circuit.
10 2001-06-19
TOSHIBA
(Fig.4-b) Vertical edge enhancement characteristic
"ss''"
"str'"
dl-e-tCCT.--"-
-20 - "tterr'"
(Fig.4-c) Vertical edge enhancement characteristic (detail)
L_____J______L_____J_____
_____J______L______
N . _-____
J: - ——————I——————-I——————I——————-I——————I——-—— —
f(MHz)
TC90A13N/F
The relation between a and b. (refer to Fig.4-a)
a: The difference in luminance level is in the
enhanced part of the edge.
b: The component of vertical edge enhancement
that is added to the luminance signal.
Both are expressed as digital values.
(A) Enhance Value HIGH ------ (B) MID ..... (C) LOW
- (D) Enhance value HIGH - - (E) MID-- (F) LOW
A, B, C : Coring=OFF D, E, F : Coring=0N
- Wide band width
---- Narrow band width
2001 -06-1 9
TOSHIBA TC90A13N/F
APPLICATION CIRCUIT
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u. 0 “I w UJ an
L u _-. > > u
E :LI’
23 22 19 18 17 16 15
3 TC 9 0 A13 N/F
1 4 6 7 11 14
LL LL LL
d, a l
, , w , E 1
o o " '3‘ o 2 G
“C L" c;
tik a:
,-' CLOCK 5V Sf
-l . th
ii', VIDEO IN gs
12 2001-06-19
TOSHIBA TC90A13N/F
PACKAGE DIMENSIONS
SDlP28-P-400-1.78 Unit : mm
J"'-'1r-1r'1C'lf-lf-1f-1I-1f-1r-lf-nr-1r-1r-'l
l_ll_ll_JLJ!_ILJL_lL_ll_lI_JL_Il_JI_lL.J
0—!“ 5°
26.1 MAX
25.6:02
‘ 3.8i0.3
3.0i0.3
1 .243TYP
Weight : 1.7g (Typ.)
13 2001-06-19
TOSHIBA TC90A13N/F
PACKAGE DIMENSIONS
SOP28-P-450-1.27 Unit : mm
2i'popcpopooppp1i'-----r--r
8 810 2
1 1.8i0.3
(450mil)
j'?rrl.ii43i,,al.1'.l,l,/i1j?1li
0.995TYP H T 0.43:0.1 21mm _
1.27 _ _
L 19.0MAX
cp.x.-kt u,
u,' _ 'ii,,
r- FF? 7—
z::ho.t $5
ei 1 .0102
Weight : 0.8g (Typ.)
14 2001-06-19
TOSHIBA TC90A13N/F
RESTRICTIONS ON PRODUCT USE
000707EBA
OTOSHIBA is continually working to improve the quality and reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe
design for the entire system, and to avoid situations in which a malfunction or failure of such
TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please
keep in mind the precautions and conditions set forth in the "Handling Guide for
Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics
applications (computer, personal equipment, office equipment, measuring equipment, industrial
robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor
warranted for usage in equipment that requires extraordinarily high quality and/or reliability or
a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended
Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship
instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA
products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade
OThe information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of
intellectual property or other rights of the third parties which may result from its use. No
license is granted by implication or otherwise under any intellectual property or other rights of
TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
15 2001-06-19
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