TC55V328BJ-15 ,32,768 WORD-8 BIT STATIC RAMTOSHIBA TC55V328BJ/BFT-12,-1532,768-WORD BY 8-BIT CMOS STATIC RAMThe TC55V328BJ/BFT is a 262,144-bi ..
TC55V4000ST-70 ,524,288-WORD BY 8-BIT FULL CMOS STATIC RAMfeatures using CE • Data retention supply voltage of 1.5 to 3.6 V Access Time 70 ns 85 ns • Direct ..
TC55V4000ST-85 ,524,288-WORD BY 8-BIT FULL CMOS STATIC RAMTC55V4000ST-70,-85 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 524,288-WORD BY 8-BIT ..
TC55V400AFT-55 ,262,144-WORD BY 16-BIT FULL CMOS STATIC RAMFEATURES Access Times (maximum): Low-power dissipation Operating: 10.8 mW/MHz (typical) TC55V ..
TC55V400AFT-55 ,262,144-WORD BY 16-BIT FULL CMOS STATIC RAMfeatures using CE1 and CE2 Data retention supply voltage of 1.5 to 3.6 V Access Time 55 ns 70 ns ..
TC55V400AFT70 ,262,144-WORD BY 16-BIT FULL CMOS STATIC RAMTC55V400AFT-55,-70 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 16-BI ..
TC93P27F ,DTS Microcontroller (DTS-21)TC93P27F TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC93P27F DTS Microcontroller ..
TC9400CPD , VOLTAGE-TO-FREQUENCY/FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400CPD , VOLTAGE-TO-FREQUENCY/FREQUENCY-TO-VOLTAGE CONVERTERS
TC9400F ,SUMM-DELTA MODULATION SYSTEM DA CONVERTER WITH A BUILT-IN 8-TIMES OVER SAMPLING DIGITAL FILTER/DIGITAL ATTENUATORTC94OOF/NT(‘annF T(annNI Slit'--.---- ' I Slit'--.---."E-A MODULATION SYSTEM DA CONVERTER WITH A BU ..
TC9402CPD , VOLTAGE-TO-FREQUENCY/FREQUENCY-TO-VOLTAGE CONVERTERS
TC9402CPD , VOLTAGE-TO-FREQUENCY/FREQUENCY-TO-VOLTAGE CONVERTERS
TC55V328BFT-15-TC55V328BJ-12-TC55V328BJ-15
32,768 WORD-8 BIT STATIC RAM
TOSHIBA TC55V328BJ/BFT-12,-15
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
32,768-WORD BY 8-BIT CMOS STATIC RAM
DESC RI PTION
The TC55V328BJ/BFT is a 262,144-bit high-speed static random access memory (SRAM) organized as 32,768
words by 8 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed and
le-voltage operation, it operates from a single 3.3 V power supply. There are_two control inputs. Chip enable
(CE) can be used to place the device in a low-power mode, and output enable (OE) provides fast memory access.
This device is well suited to cache memory applications where high-speed access and high-speed storage are
required. All inputs and outputs are directly LN PI L compatible. The TC55V328BJ/BFT is available in plastic
28-pin SOJ (300 mil width) and TSOP packages for high density surface assembly.
FEATURES
0 Fast access time (the following are maximum values) 0 Singe power tml voltage:
TC55V328BJ/BFT-12: 12 ns T 55V328BJ T-12 : 3.3V+0.3Vor-0.2V
TC55V328BJ/BFT-15: 15 ns T055V328BJ/BFT-15 : 3.3Vk0.3V
0 Low- ower dissipation 0 Fully static operation
(the bllowing are maximum values) 0 All inputs and outputs are LVIITL compatible
Operating: 120 mA (12 ns type) 0 Out ut buffer control usingUE
Operating: 100 mA (15 ns type) 0 Pac ages:
Standby : 300 PA (all devices) SOJ28-P-300-1.27A(BJ) (Weight: 0.83 gtyp)
TSOP I 28-P-0.55 (BFT) (Weight: 0.22 g typ)
PIN ASSIGNMENT BLOCK DIAGRAM
A14 o-
A0 to A14 Address Inputs mg o- 'dl,,,- ti - MEMORY CELL v
l/OI to l/O8 Data Inputs/Outputs A8 o- I-UI-u o ARRAY I DD
- . tl, = itg 't a 8
CE Chip Enable Input A5 29:2 2 'it 512x64x8 A-o GND
W Write Enable Input I''] = - (262,144)
E Output Enable Input L E l I
VDD Power(+3.3V) l/OI C -
1/02 '- / ‘ F-
GND Ground m3 : E 'ji/i),---, SENSE AMP =-=,,?i( E
PIN CONNECTION It' 2 (E f 'ii," 05
TC55V328BJ TC55V328BFT I/O6 C t y, COLUMN 5 L;
A14“ llllllllllllllllllllllllllll l/O? e em DECODER ") 33
A12[ 2 |/08 I I
Apr 3 8 COLUMNADDRESS CE
Atl 4 A g A- BUFFER
ASE 5 iit = td cc
A4165 8h' [301321301
23E I > (TOP VIEW) d tl A1 A9 All
Alf 9 th.
AOE o 2
HO”: 1 V
1/02[ m o-zcr
|/O3[ 8
GNDL 15 2 E 0 iil )
(TSOP) E o-r-ttr- CE
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Pin Name E A11 As N A13 W VDD A14 A12 A7 As As A4 A3
Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Pin Name A2 A1 A0 l/OI |/02 |/03 GND l/OI |/05 |/06 I/O? l/O8 E A10
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1997-06-18 1/9
TOSHIBA TC55V328BJ/BFT-12,-15
MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.5 to 4.6 V
Ihr: Input Voltage - 0.5* to 4.6 V
VI/O Input/Output Voltage - 0.5* to VDD + 0.5** V
PD Power Dissipation 0.5 W
Tsolde, Soldering Temperature (10s) 260 T
Tstrg Storage Temperature - 65 to 150 °C
Topr Operating Temperature - 10 to 85 "C
*: - 1.5V with a pulse width of 20% of tRc(4ns max.)
**: VDD+1.5V with a pulse width of 20% of tRc(4ns max.)
DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
-12 3.1 3.3 3.6
Von Power Supply Voltage V
-15 3.0 3.3 3.6
" Input High Voltage 2.0 - VDD+0.3** v
" Input Low Voltage - 0.3* - 0.8 V
* : - 1.0V with a pulse width of 20% of tRc(4ns max.)
** .' VDD+1.0V with a pulse width of 20% of tRc(4ns max.)
DC CHARACTERISTICS (Ta = 0° to 70°C, -12:vDD = 3.3V + 0.3V or -o.2v, -15:vDD = 3.3V , 0.3V)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
In. Input Leakage Current " = 0Vto Vor; - - i 1 PA
E = VIH oro" = " orc/E = Ihr.
Lo Output Leakage Current - - i 1 [1A
VOUT = OVtO VDD
. IOH = - 2mA 2.4 - -
VOH Output High Voltage
IOH = - 100 PA VDD - 0.2 - - V
loL = 2 mA - - 0.4
VOL Output Low Voltage
IOL = 100 FA - - 0.2
' tcycle = Minimum Cycle, E = " - 12 - - 120
boo Operating Current mA
Otherlnputs = " or VlL, Iout = 0mA - 15 _ - 100
IDDS1 CE = I/m . . - - 20 mA
Otherlnputs = " or VlL, tcycle = Minimum Cycle
Standby Current -
CE = VDD - 0.2V
bose Other Inputs = VDD - 0.2Vor0.2V - - 300 PA
1997-06-18 2/9
TOSHIBA
CAPACITANCE (Ta = 25°C,f = 1.0 MHz)
TC55V328BJ/BFT-12,-15
SYMBOL PARAMETER TEST CONDITION MAX UNIT
Cm Input Capacitance VlN = GND 6 pF
CI/o Input/Output Capacitance VI/o = GND 10 pF
Note: This parameter is periodically sampled and is not 100% tested.
OPERATING MODE
MODE E E m IIO1 to I/O8 POWER
Read L L H Output IDDO
Write L x L Input IDDO
Outputs Disable L H H High Impedance IDDO
Standby H x x High Impedance IDDS
x: Don't care
1997-06-18 3/9
TOSHIBA
TC55V328BJ/BFT-12,-15
AC CHARACTERISTICS (Ta = 0° to 70°C, 42:va = 3.3V + 0.3V or 02V, -1 sszD = 3.3V i 0.3V)
READ CYCLE
TC55 V328BJ/BFT-12 TC55 V328BJ/BFT-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
tRc Read Cycle Time 12 - 15 -
tAcc Address Access Time - 12 - 15
tco Chip Enable Access Time - 12 - 15
tog Output Enable Access Time - 6 - 7
tOH Output Data Hold Time from Address Change 3 - 3 - ns
tcoE Output Enable Time from Chip Enable 3 - 3 -
tcoo Output Disable Time from Chip Enable - 7 - 8
tOEE Output Enable Time from Output Enable 1 - 1 -
tooo Output Disable Time from Output Enable - 7 - 8
WRITE-CYCLE
TC55 V32881/BFT-12 TC55 V328BJ/BFT-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
twc Write Cycle Time 12 - 15 -
twp Write Pulse Width 8 - 10 -
tAw Address Valid to End of Write 10 - 10 -
tcw Chip Enable to End of Write 10 - 11 -
tAs Address Setup Time 0 - 0 -
tWR Write Recovery Time 0 - 0 - ns
tos Data Setup Time 7 - 8 -
tDH Data Hold Time 0 - 0 -
toew Output Enable Time from W 1 - 1 -
toow Output Disable Time from W - 7 - 8
AC TEST CONDITIONS M
Input Pulse Levels 3.0 V, 0.0 V 3.3 V
Input Pulse Rise and Fall Time 3ns
Input Timing Measurement Reference 1 5V . - ' 12000
Levels . IIO pin 20 - 509 " pm
Output Timing Measurement Refer- 1.5V - -
ence Levels CL = 30 pF RL - 500 CL - 5 pF 870 n
Output Load Fig. 1 J)
(For tcos, toes, tCOD, tooo,
toEw and t00w)
K-- 1.5V
1997-06-18 4/9
TOSHIBA TC55V328BJ/BFT-12,-15
TIMING DIAGRAMS
READCYCI-E(seeNote1)
ADDRESS
tCOD (See Note 5)
tOEE (See Note 5)
tooo (See Note 5)
OE (See Note 5)
DOUT VALID DATA OUT
INDETERMINATE INDETERMINATE
WRITE CYCLE (W CONTROLLED 1) (See Note 4)
ADDRESS )( )(
tas twp tWR
l ‘3 1
WE k R 7
6 , /"
toow (See Note 5) toEw (See Note 5)
DOUT (See Note 2) (See Note 3)
INDETERMINATE INDETERMINATE
tos tDH l
DIN VALID DATA IN (
1997-06-18 5/9
TOSHIBA TC55V328BJ/BFT-12,-15
WRITE CYCLE 2 ',_ftfft" CONTROLLED) (See Note 4)
ADDRESS
tas twp tWR
WE , /"
CE "k "N 7
tCOE (See Note 5) tODW (See Note 5)
--H""'-vv'
INDETERMINATE tos - tDH
AN VALID DATA IN
1997-06-18 6/9
TOSHIBA TC55V328BJ/BFT-12,-15
Note: (1) Tt?Tfremains HIGH for the read cycle.
(2) If (TE goes LOW coincident with or after TirtT goes LOW, the outputs will remain at high
impedance.
(3) If tJE goes HIGH coincident with or before WE goes HIGH, the outputs will remain at
high impedance.
(4) If CT is HIGH during the write cycle, the outputs will remain at high impedance.
(5) The parameters are specified below measured using the load shown in Fig. I.
(A)tcoE, tOEE, tOEW ...... Output Enable Time
(BNCOD, tom), tODW ...... Output Disable Time
DOUT fe/f VALID DATA OUT
INDETERMINATE INDETERMINATE
1997-06-18 7/9
TOSHIBA TC55V328BJ/BFT-12,-15
OUTLINE DRAWINGS
Plastic SOJ (SOJ28-P-300-1.27A)
Unit in mm
r-tr-lt-tr-ll-Ir-ll-Iron.?'-?'-).?)'-'"''
8'4-0.02
cicsu.oclcscsclcicicrclclc:C-.j a
I 18.84MAX
18.42i0.12
l 0.71 -0.05
‘0.8MIN
Weight : 0.83g (Typ.)
1997-06-18 8/9
TOSHIBA
OUTLINE DRAWINGS
Plastic TSOP (TSOP I 28-P-0.55)
a a: M.
tat 11: 1:
:1: 11:
cat ICI
car :1:
= It, r
tat TCa' '
tat V 11::
14 tat hu- 1;
- 11.8i0.2 E
.: 13.4m2 = g
J A, _
Weight : 0.22g (Typ.)
TC55V328BJ/BFT-12,-15
Unit in mm
8 ZMAX
7.9i0.1
0.15 +£3.05
1997-06-18 9/9
www.ic-phoenix.com
.
