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TC55V1403FT-15 |TC55V1403FT15TOSHIBAN/a3676avai4,194,304 WORD BY 1-BIT/1,048,576 WORD BY 4 BIT CMOS STATIC RAM


TC55V1403FT-15 ,4,194,304 WORD BY 1-BIT/1,048,576 WORD BY 4 BIT CMOS STATIC RAMTOSHIBA TC55V1403J/FT-15,-204,194,304-WORD BY 1-BlT/1,048,576-WORD BY 4-BIT CMOS STATIC RAMThe TC55 ..
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TC55V1403FT-15
4,194,304 WORD BY 1-BIT/1,048,576 WORD BY 4 BIT CMOS STATIC RAM
TOSHIBA TC55V1403J/FT-15,-20
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
4,194,304-WORD BY 1-BIT/1,048,576-WORD BY 4-BIT CMOS STATIC RAM
DESC RI PTION
The TC55V1403J/FT is a 4,194,304-bit high speed static random access memory (SRAM), it is possible to
change the organization between 4,194,304 words by 1 bit and 1,048,576 words by 4 bits. Fabricated using
CMOS technology and advanced circuit techniques to provide high speed, it operates from a single 3.3 V power
supply. Chip enable (C-E) can be used to place the device in a low-power mode, and output enable (W) provides
fast memory access. This device is well suited to cache memory applications where high-speed access and high-
speed storage are required. All inputs and outputs are directly LVTTL compatible. The TC55V1403J/FT is
available in a plastic 32-pin SOJ and TSOP package (400 mil width) for high density surface assembly.
FEATU RES
0 Fast access time (the following are maximum values) It Single power supply voltage of 3.3V , 0.3V
TC55V1403J/FT-15 : 15 ns ft Fully static operation
TC55V1403J/FT-20 : 20 ns 0 All inputs and outputs are LVTTL compatible
0 Low-power dissipation 0 Separate data input and output (X 1 Mode),
(the following are maximum values) Common data input and output (X 4 Mode)
Cycle Time 15 20 25 ns 0 Output buffer control usingtE
Operation (max) 140 130 110 mA dt Package :
SOJ32-P-400-1.27A (J) (Weight: 1.22 g typ)
Standby .. mm (both devices) TSOP H 32-P-400-1.27 (FT) (Weight : 0.51 g typ)
PIN ASSIGNMENT PIN NAMES
'S, x; A0 to A21 Address Inputs
x x I/O1 to I/O4 Data Inputs/Outputs
TC55V1403J TC55V1403FT
F o D Data Input
A0 AOL 323A19 A21 A0 AOI:1 32 :A19 A21 Q Data Output
A1 AIC 2 31 JA18 A20 A1 A1: 2 31 =|A18 A20 - .
A2 A20 3 30 JA17 A19 A2 A2: 3 30 :A17 A19 CE Chip Enable Input
A3 A3: 4 29 :|A16 A18 - .
2 tri g 1211:: 2:: A4 A_4=5 "it'" 28 =35 A17 _E Write Enable Input
- - A5 CE: 6 LU 27 = OE A16 OE Output Enable Input
Ad CE[ 6 L" ”JOE E5 E |/O1|= 7 - 26 = 1/04 E Von Power (+ 3 3V)
CE won: 7 ' 2Ch/04 OE Voo VDD: 8 > 25 = GND GND .
VDD VDDE 8 253GND GND GNDGND= 9 CL 24 = VDD VDD GND Ground
n. _D |/O_2I= 10 23 211/03 Q . .
GNDGNDEQ o 2Clum, vDD WE WE: 11 O 22 =A14 A15 B1/B4 Bit Function
_D l/c_r2lilt) H- 23]"°3 Q A6 A5: 12 C 21 :IA13 A14
WE WE[11 v 223AI4 A15 A7 A6E13 20 :A12 A13 Note
A6 A5[12 21]A13 A14 A8 A71: 14 19 2mm A12 .T:a-n -
A7 A6E13 203A12 A13 A9 A8: 15 18 :50 M1 X1 mode . ...l..,l.,1/1.l4a=yew,
A8 A7C14 193A11 A12 A10 A9: 16 17 = B1/B4 B1/B4 M4 mode : B1/B4=High
A9 A8[1S 18]A10 A11
A10 A9E16 17ilM/B4 M/B4
(SOJ) (TSOP)
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1998-05-20 1/8
TOSHIBA TC55V1403J/FT-15,-20
BLOCK DIAG RAM
o- o, cc MEMORY CELL
= i,fhlli ii' ARRAY l Cl VDD
o_°_§g; tiii,?,' 1024x1024x4 4-o GND
'o'="<"a mo - (4,194,304)
x1 MODE: Do [k, -----_ _koo
x4 MODE: l/OI c ts, COLUMN I/O Ps
v'"r, / CIRCUIT
c F, -
"s, COLUMN
DECODER
C) 'Cir,
I/o4c rs
K D: CE
0 A COLUMN
2 , ADDRESS BUFFER
'tfri HANNAH
95 A21 ""''''"s_,._..,/ A10: x1 MODE
uu A19 /\/ A10: x4 MODE
-Ir- CE
MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.5 to 4.6 V
VlN Input Terminal Voltage - 0.5* to 4.6 V
VI/o Input/Output Terminal Voltage - 0.5* to VDD + 0.5** V
PD Power Dissipation 1.0 W
Tsolder Soldering Temperature (10s) 260 'C
Tstrg Storage Temperature - 65 to 150 'C
Topr Operating Temperature - 10 to 85 'C
d,' : -1.5V with a ulse width of 20%.tRC min(4ns max)
: VDD+1.5V wit a pulse width of 20%.tRC min(4ns max)
DC RECOMMENDED OPERATING CONDITIONS (Ta = ty' to 70°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDD Power Supply Voltage 3.0 3.3 3.6 V
Ihr, Input High Voltage 2.0 - VDD + 0.3** V
" Input Low Voltage - 0.3* - 0.8 V
d', : -1.OV with a ulse width of 20%.tRC min(4ns max)
: VDD+1.0V wit a pulse width of 20% . tRC min(4ns max)
1998-05-20 2/8
TOSHIBA
TC55V1403J/FT-15,-20
DC CHARACTERISTICS (Ta = 0° to 70°C, VDD = 3.3V i 0.3V)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
I Input Leakage Current V 0 t V 1 1 A
- = o - -
IL (Except B1/B4 pin) IN DD ’u
k E=V|H or m=V|L or O-E--ve
ILO Output Lea age Current VouT=0 to VDD -1 - 1 tdk
||(87/B4) Input Current(M/B4 pin) VIN=0 to Vor; -1 - 10 prA
. IOH = - 2mA 2.4 - -
VOH Output High Voltage
IOH = -10OA VDD - 0.2 - - V
kw = 2mA - - 0.4
VOL Output Low Voltage
kw-- 100rrA - - 0.2
E: Ihr, Iout = 0mA tcycle =15ns - - 140
IDDO Operating Current E = " tcycle = 20ns - - 130 mA
Other Inputs = " / " tcycle = 25ns - - 110
|DDS1 E: Ihri, Other Inputs-- " or " - - 55
Standby Current E: VDD - 0.2V mA
loose - - 10
Other lnputs=VoD- 0.2V or 0.2V
CAPACITANCE (Ta = 25°C, f = 1.0 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance " = GND 6 pF
CI/o. CouT Input/Output, Output Capacitance VI/o = GND 8 pF
Note: This parameter is periodically sampled and is not 100% tested.
OPERATING MODE
TC55V1403J/FT is possible to change the organization of bit mode between 4M words by one bit and
IM words by four bits with input level of pin condition Trf/Ba.
"4M X 1 Mode" is performed on when pin Trf/Bt is held on "GND level".
4 Mode" requires BT/B4 be connected to "VDD level".
Input level of B-1/B4 condition must be set at the same time of power on.
level B-1/B4, high or low, is prohibited after power on.
On the other hand "IM X
Any of change of input
MODE ir1/B4 E E I/i-tE " POWER
Read L L L H Output IDDO
x1 Write L L X L Input IDDO
MODE Output Disabled L L H H High Impedance IDDO
Standby L H X M High Impedance IDDS
Read H L L H Output IDDO
x4 Write H L X L Input IDDO
MODE Output Disabled H L H H High Impedance IDDO
Standby H H X X High Impedance IDDS
M .' Don't care
1998-05-20 3/8
AC CHARACTERISTICS (Ta = 0° to 70°C (Note 1), VDD = 3.3V i 0.3V)
TC55V1403J/FT-15,-20
READ CYCLE
SYMBOL PARAM ETER TC55V1403J/FT-15 TC55V1403J/FT-20 U NIT
MIN MAX MIN MAX
tec Read Cycle Time 15 - 20 -
tAcc Address Access Time - 15 - 20
tco Chip Enable Access Time - 15 - 20
toe Output Enable Access Time - 8 - 10
tOH Output Data Hold Time from Address Change 4 - 5 - ns
tcoe Output Enable Time from Chip Enable 4 - 5 -
tOEE Output Enable Time from Output Enable 1 - 1 -
tCOD Output Disable Time from Chip Enable - 8 - 8
tooo Output Disable Time from Output Enable - 8 - 8
WRITE CYCLE
TC55V1403J/FT-15 TC55V1403J/FT-20
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
twc Write Cycle Time 15 - 20 -
twp Write Pulse Width 9 - 11 -
ttw Chip Enable to End of Write 12 - 13 -
taw Address Valid to End of Write 12 - 13 -
Us Address Setup Time 0 - 0 -
tWR Write Recovery Time 0 - 0 - ns
tos Data Setup Time 8 - 10 -
tDH Data Hold Time 0 - 0 -
tOEw Output Enable Time from Write Enable 1 - 1 -
toow Output Disable Time from Write Enable - 8 - 8
AC TEST CONDITIONS Lig._1 33v
Input Pulse Level 3.0V/0.0V
Input Pulse Rise and Fall Time 2ns 12000
. . 1/0 20 = Son l/Opin
Input Timing Measurement 1.5V
Reference: Level Cr. = 30 pF RL = 500 CL = V 8700
Output Timing Measurement 1.5V J J;
Reference Level VL-- 1.5V (For tcos, tosE,
Output Load Fig. 1 tcoo, tooo and t00w)
1998-05-20 4/8
TOSHIBA TC55V1403J/FT-15,-20
TIMING DIAGRAMS
READ CYCLE (See Note 2) tRC
ADDRESS
tCOD (See Note 6)
tCOE tOEE tODO (See Note 6)
. (See Note 6) (See Note 6)
Q VALID DATA OUT
INDETERMINATE INDETERMINATE
WRITE CYCLE 1 (WE CONTROLLED) (See Note 5) t
ADDRESS
- t (See Note 6)
OE ODW tOEE
(See Note 6) (See Note 6)
(See Note 6)
Q See Note 3) See Note 4)
INDETERMINATE INDETERMINATE
D VALID DATA IN
WRITE CYCLE 2 (CE CONTROLLED) (See Note 5)
ADDRESS
- tODW (See Note 6)
OE (See Note 6)
(See Note 6)
INDETERMINATE DS
D VALID DATA IN
1998-05-20 5/8
TOSHIBA TC55V1403J/FT-15,-20
Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400
linear feet per minute.
(2) WE remains HIGH for Read Cycle.
(3)If tTE goes LOW coincident with or after IT/E goes LOW, the outputs will remain
at high impedance.
(4) If UE goes HIGH coincident with or before W goes HIGH, the outputs will remain
at high impedance.
(5) If UE- is HIGH during the write cycle, the outputs will remain at high impedance.
(6) The parameters specified below are measured using the load shown in Fig. 1.
(A) tCOE, tOEE, tOEW ... ... ... ... Output Enable Time
(B) tCOD,t0D0, tODW ... ... ... ... Output Disable Time
t 0.2 V
Q 0.2V VALID DATA OUT
INDETERMINATE INDETERMINATE+ 0.2 V
1998-05-20 6/8
TOSHIBA TC55V1403J/FT-15,-20
PACKAGE DIMENSIONS
Plastic SO) (SOJ32-P-400-1.27A)
Unitinmm
i-It-Ir-qc?.?.)..,-,.!-,,-?''",,''"'??"")
cu 'gl
til a' t
59 8, c:
L..ll...JulclclL.lLdull..du..ll-lull-ll-lt-lt-l
I 21.3mm
20.96i0.12
/ l 5 g
0.4333;
Em . 2mm;
|1.27l
Weight: 1.22g (typ)
1998-05-20 7/8
TOSHIBA TC55V1403J/FT-15,-20
PACKAGE DIMENSIONS
Plastic TSOP (TSOPII 32-P-400-1.27)
Unit in mm
'4p4f2RplFlfRRRiqFlFlRplfqFl --r
".' cu.
Hldtiriheildldtildtitfrctit5ti L
0.95TYP 0.4t0.1 0.21
21.35MAX
20.95i0.1 '-
l Fl ii v-.'c'l.
- F, m
01i005
Weight: 0.51 g (typ)
1998-05-20 8/8

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